Provided is a high-performance infrared optical device including a reflecting layer structure that can be widely used in the mid-infrared region. An infrared optical device that has a light emission/reception property of having a peak at a center wavelength comprises: a semiconductor substrate; and a thin film laminate portion including a first reflecting layer formed on the semiconductor substrate, a lower semiconductor layer of a first conductivity type, a light emitting/receiving layer, an upper semiconductor layer of a second conductivity type, and a second reflecting layer in the stated order, wherein the first reflecting layer has a constituent material made of AlGaInAsSb where 0Al+Ga0.5 and 0As1.0, and includes a plurality of layers that differ in impurity concentration, and the center wavelength is 2.5 m or more at room temperature.

A solar cell, a preparation method thereof, a photovoltaic module, and a photovoltaic system, wherein the solar cell includes a substrate and a first tunnel oxide layer and a passivation medium layer sequentially stacked on a first surface of the substrate. The first tunnel oxide layer is at least partially in contact with the first surface. The passivation medium layer includes at least a transparent conductive oxide layer.

A cell assembly includes a silicon substrate; a first doped region and a second doped region, having opposite polarities. The first doped region is an N-type doped region; the first doped region includes a first doped layer, a passivation layer, and a second doped layer; the passivation layer of the first doped region is provided on the first doped layer of the first doped region; and a conductive channel is formed in the passivation layer of the first doped region.

The invention relates to solar cells or solar cell modules comprising a layer on or in the front radiation-receiving side of the solar cell comprising effect pigments consisting of a transparent or semi-transparent flake-form substrate coated with one or more layers of transparent or semi-transparent materials and optionally with a post coating, and a process for their preparation.

A manufacturing method for a solar cell includes: providing a P-type silicon wafer, the P-type silicon wafer being provided with a first surface and a second surface opposite to the first surface; sequentially depositing an oxide layer, a doped amorphous silicon film layer, and a silicon oxide mask layer on the first surface of the P-type silicon wafer; and removing the oxide layer, the doped amorphous silicon film layer, and the silicon oxide mask layer coated on the second surface. According to the manufacturing method, the surface texture uniformity of the front surface of a cell piece is can be further effectively improved, and the appearance of the front surface of the cell is improved, and thus, the cell efficiency and the product yield of the solar cell are improved. The present application also relates to a corresponding solar cell.

According to at least one exemplary embodiment an empyreal reaper may be provided. The empyreal reaper may include a packaging, one or more mirrors contained within the packaging which concentrate photonic energy from a photonic light source into focused light, one or more gain mediums which receive, on one or more absorption faces, the photonic energy concentrated by the one or more mirrors, and/or a photoelectric material which receives photonic energy from the one or more gain mediums and converts the photonic energy into electrical energy.

A solar cell and a photovoltaic module is disclosed. The solar cell includes a silicon substrate, and the silicon substrate includes a front surface and a back surface arranged opposite to each other. P-type conductive regions and N-type conductive regions are alternately arranged on the back surface of the silicon substrate. Front surface field regions are located on the front surface of the silicon substrate and spaced from each other. The front surface field regions each corresponds to one of the P-type conductive regions or one of the N-type conductive regions. At least one front passivation layer is located on the front surface of the silicon substrate. At least one back passivation layer is located on surfaces of the P-type conductive regions and N-type conductive regions.

A fingerprint collection device and a display panel are provided. The fingerprint collection device includes: a base substrate, a driving circuit layer, a first passivation layer, a photodiode, a second passivation layer, and an electrode layer. A first electrode portion is electrically connected to the photodiode through a second via. A second electrode portion is electrically connected to a first signal trace and a second signal trace through a third via and a fourth via to form a bridge structure. Since the third via, the fourth via, and the second via are formed in same process, one process can be saved.

A photodiode that can detect optical radiation at a broad range of wavelengths including visible light and near-infrared. The photodiode can be used as a detector of a non-invasive sensor, which can be used for measuring physiological parameters of a patient. The photodiode can be part of an integrated semiconductor structure that generates a detector signal responsive to optical radiation at both visible and infrared wavelengths incident on the photodiode. The photodiode can include a layer that forms part of an external surface of the photodiode, which is disposed to receive the optical radiation incident on the photodiode and pass the optical radiation to one or more other layers of the photodiode.

The present application relates to a solar cell, a photovoltaic module, and a photovoltaic system. The solar cell includes an n-type semiconductor substrate, a first tunneling passivation structure, a second tunneling passivation structure, a third tunnel layer, and a third passivation layer. The n-type semiconductor substrate includes a first surface and a second surface opposite to each other. The second surface includes a passivation contact region and a passivation region adjacent to each other. The first tunneling passivation structure includes a first tunnel layer and a first passivation contact layer stacked in a direction away from the semiconductor substrate. The second tunneling passivation structure includes a second tunnel layer and a second passivation contact layer stacked on the passivation contact region. The third tunnel layer and the third passivation layer are stacked on the passivation region of the second surface.