Patent classifications
H10D30/4732
SEGMENTED FIELD PLATE STRUCTURE
A device includes a transistor formed over a substrate. The transistor includes a source structure, a drain structure, and a gate structure. A dielectric layer is formed over the transistor, and a plurality of vias are electrically connected to the source structure. A metal layer is formed over the dielectric layer. The metal layer includes a field plate over the gate structure, a plurality of contact pads over each via, and a plurality of fingers interconnecting each one of the plurality of contact pads to the field plate.
HIGH ELECTRON MOBILITY TRANSISTOR AND METHOD OF FORMING THE SAME USING ATOMIC LAYER DEPOSITION TECHNIQUE
A HEMT made of nitride semiconductor materials is disclosed. The HEMT includes the GaN channel layer, the InAlN barrier layer, and the n-type GaN regions formed beneath the source electrode and the drain electrode at a temperature such that the InAlN barrier layer in the crystal quality thereof is not degraded, lower than 800 C. The n-type GaN regions are doped with silicon (Si) and have a ratio of silicon atoms against carbon atoms (Si/C) greater than 100.
Tuneable photonic device including an array of metamaterial resonators
A photonic apparatus includes a metamaterial resonator array overlying and electromagnetically coupled to a vertically stacked plurality of quantum wells defined in a semiconductor body. An arrangement of electrical contact layers is provided for facilitating the application of a bias voltage across the quantum well stack. Those portions of the semiconductor body that lie between the electrical contact layers are conformed to provide an electrically conductive path between the contact layers and through the quantum well stack.
Group 13 Nitride Composite Substrate Semiconductor Device, and Method for Manufacturing Group 13 Nitride Composite Substrate
Provided are a group 13 nitride composite substrate allowing for the production of a semiconductor device suitable for high-frequency applications while including a conductive GaN substrate, and a semiconductor device produced using this substrate. The group 13 nitride composite substrate includes a base material of an n-conductivity type formed of GaN, a base layer located on the base material, being a group 13 nitride layer having a resistivity of 110.sup.6 .Math.cm or more, a channel layer located on the base layer, being a GaN layer having a total impurity density of 110.sup.17/cm.sup.3 or less, and a barrier layer that is located on the channel layer and is formed of a group 13 nitride having a composition Al.sub.xIn.sub.yGa.sub.1-x-yN (0x1, 0y1).
METHODS OF SPATIALLY IMPLANTING MULTIPLE SPECIES IN III-NITRIDE SEMICONDUCTOR STRUCTURES
III-nitride materials are generally described herein, including material structures comprising III-nitride material regions and silicon-containing substrates. Certain embodiments are related to gallium nitride materials and material structures comprising gallium nitride material regions and silicon-containing substrates.
PARASITIC CHANNEL MITIGATION VIA BACK SIDE IMPLANTATION
III-nitride materials are generally described herein, including material structures comprising III-nitride material regions and silicon-containing substrates. Certain embodiments are related to gallium nitride materials and material structures comprising gallium nitride material regions and silicon-containing substrates.
PARASITIC CHANNEL MITIGATION USING ALUMINUM NITRIDE DIFFUSION BARRIER REGIONS
III-nitride materials are generally described herein, including material structures comprising III-nitride material regions and silicon-containing substrates. Certain embodiments are related to gallium nitride materials and material structures comprising gallium nitride material regions and silicon-containing substrates.
METHODS OF SPATIALLY IMPLANTING SPECIES IN III-NITRIDE SEMICONDUCTOR STRUCTURES
III-nitride materials are generally described herein, including material structures comprising III-nitride material regions and silicon-containing substrates. Certain embodiments are related to gallium nitride materials and material structures comprising gallium nitride material regions and silicon-containing substrates.
PARASITIC CHANNEL MITIGATION VIA REACTION WITH ACTIVE SPECIES
III-nitride materials are generally described herein, including material structures comprising III-nitride material regions and silicon-containing substrates. Certain embodiments are related to gallium nitride materials and material structures comprising gallium nitride material regions and silicon-containing substrates.
PARASITIC CHANNEL MITIGATION USING SILICON CARBIDE DIFFUSION BARRIER REGIONS
III-nitride materials are generally described herein, including material structures comprising III-nitride material regions and silicon-containing substrates. Certain embodiments are related to gallium nitride materials and material structures comprising gallium nitride material regions and silicon-containing substrates.