An optical sensing device includes a thin film transistor disposed on a substrate, an optical sensor, a planar layer, and an organic light emitting diode. The optical sensor includes a metal electrode disposed on a gate dielectric layer of the thin film transistor and connecting to a drain electrode of the thin film transistor, an optical sensing layer disposed on the metal electrode, and a first transparent electrode disposed on the optical sensing layer. The planar layer covers at least a part of the thin film transistor and the optical sensor. The organic light emitting diode is disposed on the planar layer. The anode electrode and the cathode electrode of the organic light emitting diode are electrically coupled to a gate line and a data line respectively.

A thin film transistor includes a polysilicon layer on a substrate, which includes a first area between second and third areas. A polysilicon layer is formed on the substrate, and a source electrode and a drain electrode are formed on the polysilicon layer in the first and third areas. Each of the source electrode and the drain electrode includes a metal silicide layer adjacent the polysilicon layer.

Systems, methods, and apparatus for an improved body tie construction that produces all the benefits of conventional body tie (H-gate, T-gate), without the limitations and degradations associated with those constructions are described. The improved body tie construction is configured to have a lower resistance body tie when the transistor is off (Vg approximately 0 volts). When the transistor is on (Vg>Vt), the resistance to the body tie is much higher, reducing the loss of performance associated with presence of body tie.

A semiconductor device including a nonvolatile memory cell in which a writing transistor which includes an oxide semiconductor, a reading transistor which includes a semiconductor material different from that of the writing transistor, and a capacitor are included is provided. Data is written to the memory cell by turning on the writing transistor and applying a potential to a node where a source electrode (or a drain electrode) of the writing transistor, one electrode of the capacitor, and a gate electrode of the reading transistor are electrically connected, and then turning off the writing transistor, so that the predetermined amount of charge is held in the node. Further, when a p-channel transistor is used as the reading transistor, a reading potential is a positive potential.

The display device including a pixel circuit has a first line, a transistor, a light emitting element, and a second line. The transistor is located between the second line and an electrode of the light emitting element. Either the first line or the second line is wired in a region that overlaps a light emitting region of the light emitting element in a lamination direction of layers. The second line intersects the first line outside of the light emitting region and overlaps a non-light emitting region of the light emitting element.

A display may have an array of pixels each of which has a light-emitting diode such as an organic light-emitting diode. A drive transistor and an emission transistor may be coupled in series with the light-emitting diode of each pixel between a positive power supply and a ground power supply. The pixels may include first and second switching transistors. A data storage capacitor may be coupled between a gate and source of the drive transistor in each pixel. Signal lines may be provided in columns of pixels to route signals such as data signals, sensed drive currents from the drive transistors, and predetermined voltages between display driver circuitry and the pixels. The switching transistors, emission transistors, and drive transistors may include semiconducting-oxide transistors and silicon transistors and may be n-channel transistors or p-channel transistors.

A method of providing a conducting structure over a substrate, which comprises: disposing a lower sub-layer over a substrate, the lower sub-layer comprising a conductive metal oxide material that includes indium and zinc, wherein the indium and zinc content in the bottom sub-layer substantially defines a first indium to zinc content ratio; performing a first hydrogen treatment over an exposed surface of the lower sub-layer for introducing hydrogen content therein; disposing a middle sub-layer over the lower sub-layer, the middle sub-layer comprising a metal material; disposing an upper sub-layer over the middle sub-layer, the upper sub-layer comprising a conductive metal oxide material that includes indium and zinc, wherein the indium and the zinc content in the upper sub-layer substantially defines a second indium to zinc content ratio smaller than the first indium to zinc content ratio; and patterning the multi-layered conductive structure to generate a composite lateral etch profile.

A display panel is provided. The display panel has an active area and a border area out of the active area. The display panel includes a plurality of pixels, a first gate driver portion, a plurality of scan lines and a multiplexer portion. The pixels are located in the active area. The first gate driver portion is located in the border area. The scan lines are located in the active area, and connected to the first gate driver portion. The multiplexer portion is located in the border area. The multiplexer portion and the first gate driver portion at least partially overlap along a direction parallel to one of the plurality of scan lines.

A semiconductor device and a method of manufacturing the semiconductor device are provided. The semiconductor device includes a semiconductor layer, a gate electrode on the semiconductor layer, a first insulating layer between the semiconductor layer and the gate electrode; a second insulating layer on the gate electrode, source and drain electrodes corresponding to both ends of the semiconductor layer and disposed on the second insulating layer, and a doping layer disposed along contact holes of the first and second insulating layers, which expose the both ends of the semiconductor layer, such as, between the both ends of the semiconductor layer and the source and drain electrodes.

It is an object to manufacture a highly reliable display device using a thin film transistor having favorable electric characteristics and high reliability as a switching element. In a bottom gate thin film transistor including an amorphous oxide semiconductor, an oxide conductive layer having a crystal region is formed between an oxide semiconductor layer which has been dehydrated or dehydrogenated by heat treatment and each of a source electrode layer and a drain electrode layer which are formed using a metal material. Accordingly, contact resistance between the oxide semiconductor layer and each of the source electrode layer and the drain electrode layer can be reduced; thus, a thin film transistor having favorable electric characteristics and a highly reliable display device using the thin film transistor can be provided.