Patent classifications
H10F71/128
CRUCIBLE, FABRICATION METHOD OF THE CRUCIBLE, AND FABRICATION METHOD OF A CRYSTALLINE MATERIAL BY MEANS OF SUCH A CRUCIBLE
A crucible for formation of a crystalline material by solidification by growth on seed, including a bottom, at least one side wall orthogonal to the bottom of the crucible, and at least two marks extending on the inner surface of the at least one side wall in an orthogonal direction to the bottom of the crucible, for materialising the position of at least one seed designed to be positioned at the bottom of the crucible, the seed including at least first and second surfaces orthogonal to the bottom of the crucible. The respective positions of at least two of the marks on at least one of the side walls define, in the crystalline material, a first cutting plane tangent to the first surface of the seed and a second cutting plane tangent to the second surface of the seed.
All-wavelength (VIS-LWIR) transparent electrical contacts and interconnects and methods of making them
A method for fabricating an optically transparent conductor including depositing a plurality of metal nanowires on a substrate, annealing or illuminating the plurality of metal nanowires to thermally or optically fuse nanowire junctions between metal nanowires to form a metal nanowire network, disposing a graphene layer over the metal nanowire network to form a nanohybrid layer comprising the graphene layer and the metal nanowire network, depositing a dielectric passivation layer over the nanohybrid layer, patterning the dielectric passivation layer using lithography, printing, or any other method of patterning to define an area for the optically transparent conductor, and etching the patterned dielectric passivation layer to define the optically transparent conductor.
GRAIN GROWTH FOR SOLAR CELLS
A solar cell can include a silicon layer formed over a silicon substrate. The silicon layer can have a P-type doped region and an N-type doped region. Portions of the silicon layer can have a grain size larger than other portions of the silicon layer. For example, larger grains of the silicon layer formed within a depletion region between P-type and N-type doped regions can minimize recombination loss at the P-type and N-type doped region boundaries and improve solar cell efficiency.
Photovoltaic Material and Use of it in a Photovoltaic Device
The present invention relates to a photovoltaic material and a photovoltaic device comprising the photoactive material arranged between a hole transport layer and an electron acceptor layer. The present invention also relates to the use of the photovoltaic material.
SOLAR CELL AND METHOD OF MANUFACTURING THE SAME
Disclosed is method of manufacturing a solar cell including forming a barrier film over at least one surface of a semiconductor substrate or a semiconductor layer, forming a first conductive area on the at least one surface of the semiconductor substrate or the semiconductor layer via ion implantation of a first conductive dopant through the barrier film, and removing the barrier film.
SOLAR CELL AND METHOD OF MANUFACTURING THE SAME
Disclosed is a solar cell including a semiconductor substrate, and a dopant layer disposed over one surface of the semiconductor substrate and having a crystalline structure different from that of the semiconductor substrate, the dopant layer including a dopant. The dopant layer includes a plurality of semiconductor layers stacked one above another in a thickness direction thereof, and an interface layer interposed therebetween. The interface layer is an oxide layer having a higher concentration of oxygen than that in each of the plurality of semiconductor layers.
Method of fabricating a solar cell with a tunnel dielectric layer
Methods of fabricating solar cells with tunnel dielectric layers are described. Solar cells with tunnel dielectric layers are also described.
Semiconductor device with an epitaxial layer and method of fabricating the same
A semiconductor device includes a first semiconductor layer including a recess region and protrusions defined by the recessed region, first insulating patterns provided on the protrusions and extending to sidewalls of the protrusions, and a second semiconductor layer to fill the recess region and cover the first insulating patterns. The protrusions includes a first group of protrusions spaced apart from each other in a first direction to constitute a row and a second group of protrusions spaced from the first group of protrusions in a second direction intersecting the first direction and spaced from each other in the first direction to constitute a row. The second group of protrusions are shifted from the first group of protrusions in the first direction.
Emitters of a backside contact solar cell
A system and method of patterning dopants of opposite polarity to form a solar cell is described. Two dopant films are deposited on a substrate. A laser is used to pattern the N-type dopant, by mixing the two dopant films into a single film with an exposure to the laser and/or drive the N-type dopant into the substrate to form an N-type emitter. A thermal process drives the P-type dopant from the P-type dopant film to form P-type emitters and further drives the N-type dopant from the single film to either form or further drive the N-type emitter.
METHOD FOR PREPARING TOPCon BATTERY SUBSTRATE AND DOUBLE-SIDED ELECTROPLATED TOPCon BATTERY PREPARED THEREFROM
A method for preparing TOPCon battery substrate and double-sided electroplated TOPcon battery prepared therefrom are provided. The method includes: providing a double-sided grooved silicon matrix of a TOPCon battery; carrying out thermal repair treatment on the silicon matrix; respectively carrying out light injection treatment on the front side and the back side of the silicon matrix after thermal repair treatment, thereby the TOPCon battery substrate is obtained. Thermal repair treatment can greatly increase the overall lattice thermal motion of the silicon substrate, and light is injected into the front side and the back side in the directions of two different light incidence surfaces, so that both the front side and the back side can absorb light, thereby repairing the defects at the interface between the amorphous silicon and the silicon wafer and improving the quality of the PN junctions.