The present invention provides a method of more efficiently producing a semiconductor epitaxial wafer, which can suppress metal contamination by achieving higher gettering capability. A method of producing a semiconductor epitaxial wafer 100 according to the present invention includes a first step of irradiating a semiconductor wafer 10 with cluster ions 16 to form a modifying layer 18 formed from a constituent element of the cluster ions 16 in a surface portion 10A of the semiconductor wafer; and a second step of forming an epitaxial layer 20 on the modifying layer 18 of the semiconductor wafer 10.

Provided herein is a digital x-ray detector and a method for repairing a bad pixel thereof, the detector including a substrate; a gate line and a data line formed on the substrate such that the gate line and the data line intersect each other to form a pixel domain; a thin film transistor formed within the pixel domain such that the thin film transistor is adjacent to a portion where the gate line and the data line intersect each other, the thin film transistor including a gate electrode, an active layer, a source electrode and a drain electrode; a PIN diode which is formed within the pixel domain and which includes a lower electrode connected to the source electrode of the thin film transistor, a PIN layer formed on the lower electrode, and an upper electrode formed on the PIN layer; a bias line connected to the upper electrode of the PIN diode; and a scintillator arranged above the PIN diode, wherein on at least one of a surface of the drain electrode which faces the PIN diode and a surface of the PIN diode which faces the drain electrode, a groove is formed such that it expands a distance between the drain electrode and the PIN diode.

A backside illuminated image sensor with an array of pixels formed in a substrate is provided. To improve surface planarity, bond pads formed at the periphery of the array of pixels may be recessed into a back surface of the substrate. The bond pads may be recessed into a semiconductor layer of the substrate, may be recessed into a window in the semiconductor layer, or may be recessed in a passivation layer and covered with non-conductive material such as resin. In order to further improve surface planarity, a window may be formed in the semiconductor layer at the periphery of the array of pixels, or scribe region, over alignment structures. By providing an image sensor with improved surface planarity, device yield and time-to-market may be improved, and window framing defects and microlens/color filter non-uniformity may be reduced.

Disclosed are structures and methods of forming the structures so as to have a photodetector isolated from a substrate by stacked trench isolation regions. In one structure, a first trench isolation region is in and at the top surface of a substrate and a second trench isolation region is in the substrate below the first. A photodetector is on the substrate aligned above the first and second trench isolation regions. In another structure, a semiconductor layer is on an insulator layer and laterally surrounded by a first trench isolation region. A second trench isolation region is in and at the top surface of a substrate below the insulator layer and first trench isolation region. A photodetector is on the semiconductor layer and extends laterally onto the first trench isolation region. The stacked trench isolation regions provide sufficient isolation below the photodetector to allow for direct coupling with an off-chip optical fiber.

There is provided solid-state imaging devices and methods of forming the same, the solid-state imaging devices including: a semiconductor substrate; a glass substrate; an adhesion layer provided between the semiconductor substrate and the glass substrate; and a warpage correction film provided adjacent to one of the semiconductor substrate and the glass substrate.

A semiconductor device has a chip region including a back-side illumination type photoelectric conversion element, a mark-like appearance part, a pad electrode, and a coupling part. The mark-like appearance part includes an insulation film covering the entire side surface of a trench part formed in a semiconductor substrate. The pad electrode is arranged at a position overlapping the mark-like appearance part. The coupling part couples the pad electrode and mark-like appearance part. At least a part of the pad electrode on the other main surface side of the substrate is exposed through an opening reaching the pad electrode from the other main surface side of the substrate. The mark-like appearance part and coupling part are arranged to at least partially surround the outer circumference of the opening in plan view.

In each pixel having a plurality of photodiodes for one microlens of a plurality of pixels arranged in a pixel array part, the photoelectrically converted electrons are prevented from moving between the photodiodes, thereby to improve the electron isolating characteristic, resulting in improved performances of a semiconductor device. In a well region immediately under between a first N.sup. type semiconductor region forming a first photodiode in a pixel and a second N.sup. type semiconductor region forming a second photodiode in the pixel, an isolation region higher in impurity density than the well region is formed.

An image sensor includes a plurality of photoelectric detectors, a plurality of color filters, and at least one pixel isolation region between adjacent ones of the photoelectric detectors. The color filters include a white color filter, and the color filters correspond to respective ones of the photoelectric detectors. The at least one pixel isolation region serves to physically and at least partially optically separate the photoelectric detectors from one another.

A groove-type through hole passing through a silicon layer and a first interlayer insulating film is formed in a region around a chip formation region including a photodiode. In the groove-type through hole, a wall-like wall-type conductive pass-through portion corresponding to the groove-type through hole is formed. An electrode pad is in contact with the wall-type conductive pass-through portion. The electrode pad is electrically connected to a first interconnection through the wall-type conductive pass-through portion.

A focal plane array assembly includes a readout integrated circuit with a contact array surface, a photodiode array with a contact array surface facing the readout integrated circuit contact array surface, and an anisotropic conductive film disposed between contact array surfaces. The anisotropic conductive film includes conductive bodies that interconnect the photodiode array with the readout integrated circuit and an adhesive that couples the photodiode array to the readout integrated circuit.