A vertically integrated reconfigurable and programmable diode/memory resistor (1D1R) and thin film transistor/memory resistor (1T1R) structures built on substrates are disclosed.

Provided is a crystalline multilayer structure having good semiconductor properties. In particular, the crystalline multilayer structure has good electrical properties as follows: the controllability of conductivity is good; and vertical conduction is possible. A crystalline multilayer structure includes a metal layer containing a uniaxially oriented metal as a major component and a semiconductor layer disposed directly on the metal layer or with another layer therebetween and containing a crystalline oxide semiconductor as a major component. The crystalline oxide semiconductor contains one or more metals selected from gallium, indium, and aluminum and is uniaxially oriented.

In an embodiment, an electronic device includes a semiconductor layer having a surface, a gate and a first current electrode on the surface and a dielectric layer extending between the gate and the first current electrode and including charged ions having a predetermined charge profile.

A reverse conducting IGBT is provided with a trench gate member that is provided in an IGBT region and has a lattice-pattern layout, and a trench member that is provided in a diode region and has a stripe-pattern layout. The diode region of the semiconductor substrate includes an anode region of a first conductive type, a drift region of a second conductive type and a barrier region of the second conductive type. The barrier region is electrically connected to a top surface electrode via a pillar member that extends from a top surface of the semiconductor substrate.

A switching device including: a body of semiconductor material, which has a first conductivity type and is delimited by a front surface; a contact layer of a first conductive material, which extends in contact with the front surface; and a plurality of buried regions, which have a second conductivity type and are arranged within the semiconductor body, at a distance from the contact layer.

A Schottky diode is formed on a silicon support. A non-doped GaN layer overlies the silicon support. An AlGaN layer overlies the non-doped GaN layer. A first metallization forming an ohmic contact and a second metallization forming a Schottky contact are provided in and on the AlGaN layer. First vias extend from the first metallization towards the silicon support. Second vias extend from the second metallization towards an upper surface.

A semiconductor device comprising: a die-source-terminal, a die-drain-terminal and a die-gate-terminal; a semiconductor-die; an insulated-gate-depletion-mode-transistor provided on the semiconductor-die, the insulated-gate-depletion-mode-transistor comprising a depletion-source-terminal, a depletion-drain-terminal and a depletion-gate-terminal, wherein the depletion-drain-terminal is coupled to the die-drain-terminal and the depletion-gate-terminal is coupled to the die-source-terminal; an enhancement-mode-transistor comprising an enhancement-source-terminal, an enhancement-drain-terminal and an enhancement-gate-terminal, wherein the enhancement-source-terminal is coupled to the die-source-terminal, the enhancement-gate-terminal is coupled to the die-gate-terminal and the enhancement-drain-terminal is coupled to the depletion-source-terminal; and a clamp-circuit coupled between the depletion-source-terminal and the depletion-gate-terminal.

A circuit can include a transistor, a capacitive element, and a rectifying element. The rectifying element and the capacitive element can be serially connected and coupled to the current-carrying terminals of the transistor. An electronic device may include part of the circuit. The electronic device can include a diode that includes a horizontally-oriented semiconductor member and a vertically-oriented semiconductor member having different conductivity types. The ends of the horizontally-oriented semiconductor and vertically-oriented semiconductor members physically contact each other. A process of forming an electronic device can include forming a semiconductor layer and forming a second semiconductor member. In a finished device, a diode includes a junction between dopants of first and second conductivity types within the semiconductor layer, within the semiconductor member, or at an interface between the semiconductor layer and the semiconductor member.

A semiconductor cell includes a substrate; a buffer structure disposed on the substrate; a channel layer having a band gap, and including a first portion on the buffer structure and a first protrusion which is disposed on the first portion and has a first top surface and a first inclined surface connecting to the first top surface; a barrier having a band gap greater than the band gap of the channel layer, disposed on the channel layer, and including a second portion disposed on the first portion, and a second protrusion covering the first top surface of the first protrusion and having a second top surface and a second inclined surface connecting to the second top surface and parallel to the first inclined surface; a first electrode disposed on the second protrusion; and a second electrode disposed on the second portion of the barrier and separated from the first electrode.

Methods, systems, and apparatuses for one step formation of ohmic contacts and Schottky contacts for SiC power devices by using laser annealing are provided. An SiC power device may include a back-side ohmic contact, a n+ substrate, a n epitaxial layer, one or more p+ regions, one or more carbon layers, one or more ohmic contacts, and a Schottky contact. The one or more ohmic contacts and Schottky contact may be formed in a one step operation that may include laser annealing. During manufacturing, a metallization layer applied above the carbon layers and n-epitaxial layer may form the ohmic contacts and Schottky contacts when the annealing is performed.