Patent classifications
H04N5/378
Signal processing device and method
The present technology relates to a signal processing device and method, and a program that enable easier and more accurate failure detection. The signal processing device includes: an addition unit that adds test data for failure detection to valid data on which predetermined processing is to be performed, two or more samples processed in parallel in different paths having a same sample value in the test data; and a signal processing unit that performs the predetermined processing on the valid data and the test data that has been added to the valid data by a plurality of the paths. The present technology can be applied to in-car cameras.
Imaging device
An imaging device includes: an effective pixel region that includes a plurality of imaging elements-A, amplifies signal charges generated by photoelectric conversion, and reads the signal charges into a drive circuit; and an optical black region that includes a plurality of imaging elements-B, surrounds the effective pixel region, and outputs optical black that serves as the reference for black level. In the imaging device, the photoelectric conversion layer forming the plurality of imaging elements-A and the plurality of imaging elements-B is a common photoelectric conversion layer, the common photoelectric conversion layer is located on an outer side of the optical black region, and extends toward an outer edge region surrounding the optical black region, and an outer edge electrode is disposed in the outer edge region.
Image sensor including CMOS image sensor pixel and dynamic vision sensor pixel
An image sensor includes a CIS (CMOS image sensor) pixel, a DVS (dynamic vision sensor) pixel, and an image signal processor. The CIS pixel includes a photoelectric conversion device generating charges corresponding to an incident light and a readout circuit generating an output voltage corresponding to the generated charges. The DVS pixel detects a change in an intensity of the incident light based on the generated charges to output an event signal and does not include a separate photoelectric conversion device. The image signal processor allows the photoelectric conversion device to be connected to the readout circuit or the DVS pixel.
Method for determining imaging ratio of flexible panel electronic device and storage medium
Method for determining imaging ratio of flexible panel, electronic device and storage medium are provided. A first surface of the flexible panel is adapted to be placed with an object to be imaged, an image capturing device is disposed on the second surface, and a curvature radius of the first surface is adjustable. The method includes: for a light source in the image capturing device, acquiring a real-time image formed on the image capturing device after a light signal emitted from the light source is reflected by the first surface; determining a real-time curvature radius of the first surface based on the real-time image; and calculating the imaging ratio based on the real-time curvature radius and thickness of the flexible panel. The imaging ratio is determined based on bending degree of the flexible panel in real time to acquire an image with size approximate to actual size of the object.
Analog counter with pulsed current source for a digital pixel
An analog counter circuit for use with a digital pixel includes an input; an output; a first inverter connected to the input that produces on a first inverter output a time delayed inverted signal (RP*) from an input signal received at the input; a second inverter connected to the first inverter output that produces a time delayed signal (RP) at a second inverter output from the input signal and that is delayed relative to RP* and a control switch connected between a source voltage and a floating node. The control switch is controlled by the signal RP* on the first inverter output. The analog counter also includes a feedback capacitor connected between the second inverter output and the floating node; an accumulating capacitor that accumulates at least some of a charge that passes through the control switch; and an injection switch connected between the control switch and the accumulating capacitor.
Image sensor including DRAM capacitor and operating method thereof
An image sensor includes a pixel array having a plurality of pixels; a row driver providing the pixel array with a boosting signal; and a read-out circuit configured to read out pixel signals output from pixels of a row line selected by the row driver. Each of the plurality of pixels includes: a first photodiode; a transmission transistor connected to the first photodiode; a first floating diffusion node, a second floating diffusion node, and a third floating diffusion node, which are connected to the transmission transistor to accumulate charges generated by the first photodiode; an LCG capacitor connected to the third floating diffusion node to accumulate the charges generated by the first photodiode; an MCG transistor connected between the first floating diffusion node and the second floating diffusion node; and an LCG transistor connected to the third floating diffusion node.
Imaging device and imaging system
In an imaging device according to the present disclosure, during a period in which a signal from an amplifier transistor is output from a pixel via a select transistor, the gate voltage of the capacitance addition transistor changes frons the first voltage VH to the second voltage VL, and the amount of voltage change per time until the gate voltage changes from the first voltage VH to the second voltage VL is smaller than the amount of voltage change per unit time until the gate voltage changes from the second voltage VL to the first voltage VH.
Solid-state image sensor
An AD conversion circuit provided in a solid-state image sensor includes a counter circuit that performs count processing and a first latch circuit that holds at least one of a discrimination result of a first comparison circuit and a first output result of the counter circuit.
SPAD-based photon detectors with multi-phase sampling TDCs
A method of building a moving average histogram of photon times of arrival includes, for each time interval in first and second subsets of time intervals, latching a time reference corresponding to a time of receipt of an avalanche timing output signal of a single-photon avalanche diode (SPAD), and advancing a count stored at a memory address corresponding to the latched time reference. The memory address corresponds to a range of time references. The method further includes reading and clearing a first set of counts after the first subset of time intervals; phase-shifting the sequence of time references with respect to a set of memory addresses after the first subset of time intervals; reading and clearing a second set of counts after the second subset of time intervals; and building the moving average histogram using at least the first and second sets of counts.
IMAGING SYSTEM AND ENDOSCOPE
In an imaging system, a video output circuit is configured to convert an analog video signal into digital data and output serial data including the digital data to a signal line on the basis of a serial clock having a higher frequency than a frequency of the camera clock. A camera-clock generation circuit is configured to generate the camera clock synchronized with the system clock output to the signal line. A serial-clock generation circuit is configured to generate the serial clock synchronized with the system clock output to the signal line. A system-clock output circuit is configured to output the system clock to the signal line in a blanking period.