An imaging device with an arithmetic function in which the circuit size is reduced is provided. The imaging device includes a plurality of pixel blocks. Each of the pixel blocks includes N (N is an integer greater than or equal to 1) first circuits, N second circuits, and a third circuit. Each of the first circuits includes a photoelectric conversion device, and the photoelectric conversion device has a function of converting incident light into an electrical signal and has a function of outputting a first signal that is obtained by binarizing the electrical signal to the second circuit. Each of the second circuits has a function of outputting a second signal that is obtained by multiplying the first signal by a weight coefficient to a third circuit. When the N second signals are output to a wiring electrically connected to the third circuit, addition is performed. The first circuit includes a transistor, and an OS transistor is preferably used as the transistor.

Pixel sensitivity is improved in a solid-state imaging element that performs time delay integration.

The solid-state imaging element includes a plurality of photoelectric conversion elements and a given number of transistors. In the solid-state imaging element, the plurality of photoelectric conversion elements is arranged along a given direction with a given spacing. A size, in the given direction, of each of the plurality of photoelectric conversion elements that are arranged with the given spacing does not exceed the given spacing. Also, in the solid-state imaging element, the given number of transistors are arranged between the plurality of photoelectric conversion elements, and the transistors generate a signal commensurate with as amount of charge generated by any of the plurality of photoelectric conversion elements.

An imaging device includes a first pixel including a first photoelectric conversion region disposed in a first substrate and that converts incident light into first electric charges, and a first readout circuit including a first converter that converts the first electric charges into a first logarithmic voltage signal. The first converter includes a first transistor coupled to the first photoelectric conversion region and a second transistor coupled to the first transistor. The imaging device includes a wiring layer on the first substrate and includes a first level of wirings arranged in a first arrangement overlapping the first photoelectric conversion region and in a second arrangement overlapping the first and second transistors, the second arrangement being different than the first arrangement.

An image sensor for distance measurement and an image sensor module including the image sensor are provided. The image sensor includes: a pixel array including a plurality of pixels including a plurality of first pixels arranged on a first line and a plurality of second pixels arranged on a second line, wherein the plurality of first pixels and the plurality of second pixels are arranged to be staggered from each other, and each of the plurality of first pixels and the plurality of second pixels includes a plurality of modulation gates for receiving a plurality of modulated signals during a photocharge collection period; a row decoder that provides control signals and the plurality of modulated signals to the pixel array; and an analog-to-digital conversion circuit that receives a plurality of sensing signals from the pixel array and converts the plurality of sensing signals into a plurality of digital signals.

An image sensor includes a first voltage source that supplies a first voltage and a plurality of pixels supplied with the first voltage. The pixel includes a photoelectric conversion unit that photoelectrically converts incident light, an accumulation unit to which an electric charge resulting from photoelectric conversion by the photoelectric conversion unit is transferred and accumulated, a transfer unit that transfers the electric charge from the photoelectric conversion unit to the accumulation unit; a second voltage source that supplies a second voltage, and a supply unit that supplies the transfer unit with a transfer signal based on either the first voltage supplied by the first voltage source or the second voltage supplied by the second voltage source.

Technologies relating to CMOS image sensors with integrated Resistive Random-Access Memory (RRAMs) units that provide energy efficient analog storage, ultra-high speed analog storage, and in-memory computing functions are disclosed. An example CMOS image sensor with integrated RRAM crossbar array circuit includes a CMOS image sensor having multiple pixels configured to receive image signals; a column decoder configured to select the pixels in columns to read out; a row decoder configured to select the pixels in rows to read out; an amplifier configured to amplify first signals received from the CMOS image sensor; a multiplexer configured to sequentially or serially read out second signals received from the amplifier; and a first RRAM crossbar array circuit configured to store third signals received from the multiplexer.

A flicker detection circuit is provided. The flicker detection circuit may include a flicker detection correlated double sampling (FD CDS) circuit including first to sixth switches turned on or off based on a control signal, and first to fourth capacitors, the FD CDS circuit being configured to receive a flicker pixel signal output from at least one pixel, summate with an output offset signal, and amplify the summation based on a gain to form a flicker detection signal; and an analog-to-digital converter (ADC) configured to quantize the flicker detection signal.

Technologies are described herein for an eye tracking that may be employed by devices and systems such as head mount display (HMD) devices. Light that is reflected from a user's eye may be specular or scattered. The specular light has an intensity or magnitude that may saturate the electronics. The presently disclosed techniques mitigate saturation by generating detected signals from an optical detector, evaluating the signal levels for the detected signal, and selectively gating the detected signals that have saturated. The remaining scattered signals can be combined to achieve a combined signal that can be converted into a digital signal without saturating the electronics, which can then be processed to form an image of the eye for identification purposes, for tracking eye movement, and for other uses. The described technologies provide a clear image without ambient light reflections or specular light interfering with the image.

A solid-state imaging device includes: pixels disposed in a matrix of pixel rows and pixel columns; control wires provided for the pixel rows or the pixel columns, and each connected to at least two pixels out of the pixels, the at least two pixels being included in one of the pixel rows or the pixel columns for which the control wire is provided; drive circuits that are provided for the control wires, each include buffer elements in at least two stages, and each output a control signal to one of the control wires for which the drive circuit is provided, the buffer elements in the at least two stages being connected in series; and a first wire that short-circuits output wires of the buffer elements in one of the at least two stages in at least two of the plurality of drive circuits.

Methods and apparatus for a first photodetector array die having pixels from a first end to a second end and a second photodetector array die having pixels from a first end to a second end. A readout integrated circuit (ROIC) can be electrically coupled to the first and second photodetector array die. One or more microlenses can steer light onto the photodetector arrays.