An imaging pixel (2) to mitigate cross-talk effects comprises a voltage supply node (VN) to receive a supply voltage (VDD), and an output node (ON) to provide a pixel output signal. The imaging pixel (2) further comprises a photosensitive element (10), and a source follower transistor (31) having a control node coupled to the photosensitive element (10). The source follower transistor (31) is interposed between the voltage supply node (VN) and the output node (ON). The imaging pixel (2) comprises a clamping circuit (20) being interposed between the voltage supply node (VN) and the output node (ON).

A photoelectric conversion apparatus comprising a pixel array and a signal processor is provided. The pixel array is configured to be operable in driving modes in which different signal readout methods are used. The signal processor comprises a selector configured to select, based on the driving mode set for each pixel among the driving modes, a first pixel group and a second pixel group from regions of the pixel array, which have been designated to generate a correction value, a correction value generator configured to generate the correction value in accordance with a first representative value based on signals read out from the first pixel group and a second representative value based on signals read out from the second pixel group, and a corrector configured to correct, based on the correction value, the signal read out from the pixel array.

Provided are a solid-state imaging device, a method for driving a solid-state imaging device, and an electronic apparatus capable of reading signals produced with different conversion gains and having different signal directions.

A pixel signal processing part 400 includes a first reading part 410 and a second reading part 420. Of a pixel signal PIXOUT input into an input node ND401, the first reading part 410 inverts the signal direction of a first-conversion-gain signal (HCGRST, HCGSIG) and outputs an inverted first-conversion-gain signal (HCGRST, HCGSIG), which has been subjected to inversion and amplification, to an AD converting part 430 via a connection node ND402. Of the pixel signal PIXOUT input into the input node ND401, the second reading part 420 keeps the signal direction of a second-conversion-gain signal (LCGSIG, LCGRST) unchanged, and outputs a non-inverted second-conversion-gain signal (LCGSIG, LCGRST) to the AD converting part 430 via the connection node ND402.

A technique capable of improving linearity at a low illuminance is provided. A solid-state sensing image device includes: a pixel array including a plurality pixels arranged in a matrix form and a plurality of pixel signal lines connected to the plurality of pixels and receiving pixel signals supplied from the plurality pixels; a column-parallel A/D converting circuit connected to the plurality of pixel signal lines; and a reference-voltage generating circuit generating ramp-wave reference voltage that linearly changes in accordance with time passage. The column-parallel A/D converting circuit includes a first A/D converter, the first A/D converter includes: a first input terminal connected to the pixel signal line; a second input terminal receiving the reference voltage; and an offset generating circuit connected to the first input terminal and generating an offset voltage for the first input terminal.

Provided is a photoelectric conversion device including a pixel array that includes pixels forming columns and is arranged in a substrate, first signal lines each transmitting a signal output from a pixel of a corresponding column, an analog circuit arranged in the substrate and configured to process signals from the pixels, second signal lines transmitting signals from the pixels to the analog circuit on a column basis, a switch configured to change a combination of connections between the first signal lines and the second signal lines, and a shift register arranged in the substrate, including a flip-flop, and configured to control the switch. In a plan view with respect to the substrate, the shift register is arranged between the pixel array and the analog circuit. In the plan view, the switch and the flip-flop are arranged in a direction different from a direction in which the first signal lines extend.

In one example, an apparatus comprises: a memory to store input data and weights, the input data comprising groups of data elements, each group being associated with a channel of channels, the weights comprising weight tensors, each weight tensor being associated with a channel of the channels; a data sparsity map generation circuit configured to generate, based on the input data, a channel sparsity map and a spatial sparsity map, the channel sparsity map indicating channels associated with first weights tensors to be selected, the spatial sparsity map indicating spatial locations of first data elements; a gating circuit configured to: fetch, based on the channel sparsity map and the sparsity map, the first weights tensors and the first data elements from the memory; and a processing circuit configured to perform neural network computations on the first data elements and the first weights tensors to generate a processing result.

An imaging device includes a photoelectric conversion layer having a first surface and a second surface opposite to the first surface; a counter electrode on the first surface; a first electrode on the second surface; a second electrode on the second surface, the second electrode being spaced from the first electrode; and an auxiliary electrode on the second surface between the first electrode and the second electrode. The auxiliary electrode is spaced from the first electrode and the second electrode, where a shortest distance between the first electrode and the auxiliary electrode is different from a shortest distance between the second electrode and the auxiliary electrode.

In an imaging device, a photoelectric converter of a first pixel and a photoelectric converter of a second pixel are arranged along a first direction. At least part of a charge accumulation portion of the first pixel is disposed between the photoelectric converter of the first pixel and the photoelectric converter of the second pixel. An exit surface of a light guiding path of the first pixel is longer in a second direction orthogonal to the first direction in plan view than in the first direction.

A pixel readout circuit and a technique for imaging are disclosed. The circuit includes: an array of pixel integration circuits, each adapted for receiving an electric signal indicative of photocurrent of light sensitive pixel of a pixel matrix, integrate the electric signal over a frame period, and output the integrated signal at an imaging frame rate being one over the period; and an array of pixel derivation circuits, each includes a signal preprocessing channel for receiving a total electric signal indicative of at least a component of the photocurrent(s) of a cluster of respective light sensitive pixel(s); and a comparison unit adapted to analyze the total electric signal to determine digital data indicative of a change in the total electric signal relative to one or more thresholds; and a digital output utility adapted to readout of the digital data at a second rate different than the frame rate.

A photoelectric conversion device including a plurality of substrates in a stacked state, the plurality of substrates including a first substrate and a second substrate electrically connected to each other, the photoelectric conversion device comprising: a memory cell unit including row-selection lines that are to be driven upon selection of a row of a memory cell array and column-selection lines that are to be driven upon selection of a column of the memory cell array; and a memory peripheral circuit unit that includes row-selection line connection portions and column-selection line connection portions so as to drive the row-selection lines and to drive the column-selection lines, wherein a first portion that is at least a part of the memory peripheral circuit unit is formed on the first substrate and the memory cell unit is formed on the second substrate.