A display system includes a display panel including a plurality light emitting pixels and a reflective polarizer disposed on the light emitting pixels. The reflective polarizer can have a reflection band having a lower overlap with an emission spectrum of red light emitting pixels for substantially normally incident light and a higher overlap with the emission spectrum of the red light emitting pixels for at least one incident angle greater than about 40 degrees. The reflective polarizer can have a reflection band overlapping an emission spectrum of blue light emitting pixels for substantially normally incident light.

A first connection wire electrically connected to a first electrode via a first through-hole formed in a second flattening film, and a second connection wire electrically connected to the first connection wire via a second through-hole formed in a first flattening film are provided, and a second interlayer insulating film has a contact opening so as to pass through the second interlayer insulating film to overlap the first connection wire, and such that the edge of the contact opening surrounds the first through-hole and the second through-hole in a plan view.

A display apparatus with high display quality is provided. A high-resolution display apparatus is provided. The display apparatus includes a plurality of pixels, and the pixels each include a light-emitting device, a first transistor, a second transistor, a third transistor, a fourth transistor, and a first capacitor. One electrode of the light-emitting device is electrically connected to one of a source and a drain of the first transistor, one of a source and a drain of the second transistor, and one electrode of the first capacitor. A gate of the second transistor is electrically connected to the other electrode of the first capacitor, one of a source and a drain of the third transistor, and one of a source and a drain of the fourth transistor. One frame period of each of the pixels includes a period in which the first transistor and the fourth transistor are each in a conduction state.

The present disclosure relates to a display panel and a manufacturing method thereof, and a display device. The display panel includes a plurality of pixel units. The pixel unit includes a red sub-pixel, a green sub-pixel and a blue sub-pixel. The red sub-pixel, the green sub-pixel and the blue sub-pixel each include a cathode, an electron transport layer, a quantum dot luminescent layer, a hole function layer and an anode that are stacked. The electron transport layer is made of Mg-doped ZnO nanoparticles, and a Mg doping concentration in the electron transport layer of the red sub-pixel, a Mg doping concentration in the electron transport layer of the green sub-pixel and a Mg doping concentration in the electron transport layer of the blue sub-pixel decrease successively.

According to one embodiment, a display device comprises an insulating base, a plurality of light-emitting elements, a plurality of pixel circuits, and a plurality of lines. The insulating base includes a plurality of first island portions and a plurality of non-linear line portions connecting two of the first island portions. The light-emitting elements are arranged in each of the first island portions. The pixel circuits are arranged in each of the first island portions and driving the light-emitting elements. The lines are arranged in each of the line portions and connected to the pixel circuits of the two first island portions connected by the line portions.

A display panel and a display device. The display panel comprises: touch wirings, electrically connected to touch electrodes, and located at one side, away from a base substrate, of a barrier wall structure; the touch wirings each comprise first wiring portions; orthographic projections of at least some of the first wiring portions on the base substrate overlap an orthographic projection of a first barrier wall portion on the base substrate; the first wiring portions each comprise at least one first wiring sub-portion having an average width of a first width, and at least one second wiring sub-portion having an average width of a second width; and in an extending direction of the first wiring portion, the minimum distance between an orthographic projection of the first wiring sub-portion on the base substrate and an orthographic projection of the first barrier wall portion on the base substrate is less than or equal to 15 μm, and the first width is less than the second width, thereby reducing the frequency of short circuits.

According to one embodiment, an electronic device, wherein a insulating base and a wiring line are located between a first resin layer and a second resin layer, the insulating base includes a plurality of line portions in which the wiring line is located, and a plurality of island-shaped portions connected to the plurality of line portions, the second resin layer includes a first portion overlapping the plurality of line portions and the plurality of island-shaped portions, and a second portion located between the plurality of line portions, the second portion is in contact with the first resin layer, and at least one of the first resin layer, the first portion and the second portion is a shape memory resin layer.

A display device, a display panel, and a manufacturing method therefor are provided. The display panel includes a flexible substrate, a display layer on one side of the flexible substrate, and an encapsulation layer covering a surface of the display layer away from the flexible substrate. The display layer has a stretching area provided with a plurality of pixel islands spaced apart and a through-hole. A blocking dam is in an area corresponding to the pixel island and surrounds a plurality of light-emitting units. The encapsulation layer includes an organic layer that is in the stretching area and confined within an annular area surrounded by the blocking dam.

A thin film transistor includes an active layer, first and second electrodes, and a third doped pattern. The active layer has a channel region, and a first electrode region and a second electrode region, the first electrode region has a first ion doping concentration, and the second electrode region has a second ion doping concentration. The first electrode and the second electrode are disposed on a side of the active layer in the thickness direction. The first electrode is coupled to the first electrode region, and the second electrode is coupled to the second electrode region. The third doped pattern is disposed between the first electrode and the first electrode region, and in direct contact with the first electrode and the first electrode region. The third doped pattern has a third ion doping concentration, and the third ion doping concentration is different from the first ion doping concentration.

Disclosed is a display substrate, including: a base including a display region and a peripheral region; sub-pixels in the display region; data lines in at least the display region and extending in a first direction and electrically connected to the sub-pixels gate lines in at least the display region and extending in a second direction intersecting with the first direction electrically connected to the sub-pixels pads in the peripheral region; data leads in the peripheral region and electrically connected to the data lines and the pads; a gate driver circuit in the peripheral region and electrically connected to the gate lines; gate drive lines in the peripheral region and electrically connected to the gate driver circuit; gate leads in the peripheral region and extending in the first direction, which are electrically connected to the gate drive lines and the pads and located between the data leads.