A storage element includes a layer structure including a storage layer having a direction of magnetization which changes according to information, a magnetization fixed layer having a fixed direction of magnetization, and an intermediate layer disposed therebetween, which intermediate layer contains a nonmagnetic material. The magnetization fixed layer has at least two ferromagnetic layers having a direction of magnetization tilted from a direction perpendicular to a film surface, which are laminated and magnetically coupled interposing a coupling layer therebetween. This configuration may effectively prevent divergence of magnetization reversal time due to directions of magnetization of the storage layer and the magnetization fixed layer being substantially parallel or antiparallel, reduce write errors, and enable writing operation in a short time.

Disclosed herein are related to a memory cell including magnetic tunneling junction (MTJ) devices. In one aspect, the memory cell includes a first layer including a first transistor and a second transistor. In one aspect, the first transistor and the second transistor are connected to each other in a cross-coupled configuration. A first drain structure of the first transistor may be electrically coupled to a first gate structure of the second transistor, and a second drain structure of the second transistor may be electrically coupled to a second gate structure of the first transistor. In one aspect, the memory cell includes a second layer including a first MTJ device electrically coupled to the first drain structure of the first transistor and a second MTJ device electrically coupled to the second drain structure of the second transistor. In one aspect, the second layer is above the first layer.

A magnetic memory device may include a substrate including a first region and a second region, a first interlayer insulating layer on the substrate, a first capping layer on the first interlayer insulating layer, the first capping layer covering the first and second regions of the substrate, a second interlayer insulating layer on a portion of the first capping layer covering the first region of the substrate, a bottom electrode contact included in the second interlayer insulating layer, a magnetic tunnel junction pattern on the bottom electrode contact, and a second capping layer on the second interlayer insulating layer, the second capping layer being in contact with the first capping layer on the second region of the substrate.

A first magnetic member is provided in a region farther inward than an outer peripheral edge of a first magnetoresistance element. A second magnetoresistance element is provided in a region farther inward than an inner peripheral edge of the first magnetoresistance element and is covered by the first magnetic member or is provided in a region farther outward than the outer peripheral edge of the first magnetoresistance element and is covered by a second magnetic member. A first conductor includes a first base section and a first narrow section. The area of the exterior surface of the first narrow section as viewed from a direction perpendicular to an insulating layer is smaller than that of the first base section. In the first conductor, the first base section and the first narrow section are arranged side by side in the direction perpendicular to the insulating layer.

A multiplier is formed from a plurality of nanomagnetic structures including slant edge input nanomagnetic structures, diagonal elongate interconnect nanomagnetic structures, and output nanomagnetic structures. Input logic levels are provided by inserting a magnetic field, which generates an set of output magnetic fields representing the product of the binary input values.

Various embodiments of the present disclosure are directed towards a memory device including a free layer overlying a reference layer. A tunnel barrier layer overlies the reference layer disposed over a semiconductor substrate. The free layer overlies the tunnel barrier layer, and a capping layer overlies the free layer. A shunting structure includes a conductive material that vertically extends continuously from an outer sidewall of the free layer to an outer sidewall of the capping layer.

In some embodiments, the present disclosure relates to a memory device that includes a spin orbit torque (SOT) layer arranged over a substrate. A magnetic tunnel junction (MTJ) structure may be arranged over the SOT layer. The MTJ structure includes a free layer, a reference layer, and a diffusion barrier layer disposed between the free layer and the reference layer. A first conductive wire is arranged below the SOT layer and coupled to the SOT layer. A second conductive wire is arranged below the SOT layer and coupled to the SOT layer. A third conductive wire is arranged over the MTJ structure. The memory device further includes a first selector structure arranged between the first conductive wire and the SOT layer.

A memory includes: a substrate, having a plurality of active regions arranged in an array and a plurality of word lines extending in a first direction, the active regions being inclined at a preset angle to the word lines, the active region having at least one access transistor; a plurality of bit lines, extending in a second direction perpendicular to the first direction; magnetic tunnel junctions, one end of the magnetic tunnel junction is electrically connected to one of bit lines and another end of the magnetic tunnel junction is electrically connected to two access transistors, the two access transistors electrically connected to the magnetic tunnel junction being located in two adjacent active regions, respectively.

A ferromagnetic free layer, a preparation method and an application thereof are provided, where the ferromagnetic layer includes a magnetic film alloy, and the magnetic film alloy includes multiple layers of laminated films. A thickness of each of the films decreases gradually from a first end to a second end of the magnetic film alloy, so as to break in-plane structural symmetry of the magnetic film alloy, and the films include heavy metal films and ferromagnetic metal films, where out-of-plane crystal symmetry of the magnetic film alloy is broken by means of component gradients. When a current is applied in plane of the magnetic film alloy, a spin orbit torque will be generated, which directly drives the magnetic moment of the magnetic film alloy to undergo a deterministic magnetization reversal.

Apparatus and associated methods relate to a magnetoresistive sensor element with synthetic antiferromagnetic biasing structure separated, by a non-magnetic tuning spacer, from a free ferromagnetic layer of a TMR/GMR sensor. The synthetic antiferromagnetic biasing structure includes first and second ferromagnetic layers separated from one another by a synthetic antiferromagnetic spacer. The synthetic antiferromagnetic biasing structure is biased during manufacture and pinned via exchange coupling with an adjacent antiferromagnetic layer. The synthetic antiferromagnetic biasing structure biases the free ferromagnetic layer via tuned exchanged coupling via relative proximity controlled by thickness of the non-magnetic tuning spacer.