An oxide semiconductor layer which is intrinsic or substantially intrinsic and includes a crystalline region in a surface portion of the oxide semiconductor layer is used for the transistors. An intrinsic or substantially intrinsic semiconductor from which an impurity which is to be an electron donor (donor) is removed from an oxide semiconductor and which has a larger energy gap than a silicon semiconductor is used. Electrical characteristics of the transistors can be controlled by controlling the potential of a pair of conductive films which are provided on opposite sides from each other with respect to the oxide semiconductor layer, each with an insulating film arranged therebetween, so that the position of a channel formed in the oxide semiconductor layer is determined.

In accordance with some embodiments of the disclosed subject of matter, a TFT array substrate, a method for fabricating the TFT array substrate, and a display panel that comprises the TFT array substrate are provided. In some embodiments, the TFT array substrate comprises: a substrate; an active layer comprising a first region, a source region, a drain region, and a second region between the drain region and the first region; a gate electrode above the first insulating layer, wherein the gate electrode substantially covers the first region; and a first light-shielding layer that overlaps with the first region and substantially covers the second region.

Even when a light shielding film is provided between a transistor and a substrate, a threshold voltage of the transistor can be prevented or suppressed from being shifted. A display device includes light shielding films provided between a substrate and a semiconductor layer of a transistor including a gate electrode and the semiconductor layer. The semiconductor layer includes a source region and a drain region. Both of the light shielding films overlap the semiconductor layer when seen in a plan view, and are spaced apart from each other in a direction.

To realize a high-performance liquid crystal display device or light-emitting element using a plastic film. A CPU is formed over a first glass substrate and then, separated from the first substrate. A pixel portion having a light-emitting element is formed over a second glass substrate, and then, separated from the second substrate. The both are bonded to each other. Therefore, high integration can be achieved. Further, in this case, the separated layer including the CPU serves also as a sealing layer of the light-emitting element.

A display panel includes: a substrate including a first substrate layer which includes a glass material and a second substrate layer contacting the first substrate layer and which includes a polymer material; a thin film transistor disposed on the substrate; and a light emitting element disposed on the thin film transistor.

It is an object to provide a flexible light-emitting device with long lifetime in a simple way and to provide an inexpensive electronic device with long lifetime using the flexible light-emitting device. A flexible light-emitting device is provided, which includes a substrate having flexibility and a light-transmitting property with respect to visible light; a first adhesive layer over the substrate; an insulating film containing nitrogen and silicon over the first adhesive layer; a light-emitting element including a first electrode, a second electrode facing the first electrode, and an EL layer between the first electrode and the second electrode; a second adhesive layer over the second electrode; and a metal substrate over the second adhesive layer, wherein the thickness of the metal substrate is 10 pm to 200 pm inclusive. Further, an electronic device using the flexible light-emitting device is provided.

A method of manufacturing a low temperature polycrystalline silicon thin film and a thin film transistor, a thin film transistor, a display panel and a display device are provided. The method includes: forming an amorphous silicon thin film (01) on a substrate (1); forming a pattern of a silicon oxide thin film (02) covering the amorphous silicon thin film (01), a thickness of the silicon oxide thin film (02) located at a preset region being larger than that of the silicon oxide thin film (02) located at other regions; and irradiating the silicon oxide thin film (02) by using excimer laser to allow the amorphous silicon thin film (01) forming an initial polycrystalline silicon thin film (04), the initial polycrystalline silicon thin film (04) located at the preset region being a target low temperature polycrystalline silicon thin film (05). The polycrystalline silicon thin film has more uniform crystal size.

The present disclosure discloses a LTPS TFT and the manufacturing method thereof. The method includes: forming a semiconductor layer and a LTPS layer on the same surface on a base layer; forming an oxide layer is formed on one side of the semiconductor layer facing away the base layer, and forming the oxide layer on one side of the LTPS layer facing away the base layer; forming a first photoresist layer of a first predetermined thickness on the oxide layer; arranging a corresponding first cobalt layer on each of the photoresist layers, a vertical projection of the first cobalt layer overlaps with the vertical projection of the corresponding first photoresist layer; doping high-concentration doping ions into a first specific area of the semiconductor layer. With such configuration, the number of the masking process is decreased and the manufacturing time is reduced.

A polycrystalline silicon thin-film transistor includes a substrate; an isolation layer formed on the substrate; and a polycrystalline silicon active layer formed on the substrate and the isolation layer, with two source-drain ion implantation regions being formed at both sides of the active layer, wherein the edges at both ends of the isolation layer are within the edges at both ends of the active layer. In the polycrystalline silicon thin-film transistor and the method for manufacturing the same, it is possible to increase the grain size of the active layer, improve the grain uniformity in a channel region thereof, effectively prevent deterioration of characteristics of the active layer caused by backlight irradiation, and improve the reliability of the device.

A baseplate circuit is disclosed. The baseplate comprises an IC region, a plurality of WOA regions, a plurality of GOA regions, and a plurality of switches. Each WOA region comprises a plurality of baseplate conducting wires, each of the baseplate conducting wires is electrically connected with the IC region. Each GOA region comprises a plurality of gate lines, each of the gate lines is electrically connected with one of the baseplate conducting wires. Each of the switches is used to electrically connect one of the gate lines and one of the baseplate conducting wires.