An organic light emitting display is provided. The organic light emitting display comprises a multi-type thin-film transistor (TFT) and an organic light emitting diode. The multi-type TFT has a low-temperature-poly-silicon (LTPS) TFT and an oxide semiconductor TFT (oxide TFT) disposed on the LTPS TFT. The organic light emitting diode is electrically connected to the multi-type TFT. The LTPS TFT and the oxide TFT are connected to the same gate line.

A display substrate includes a base substrate, a switching device on the base substrate and an alignment pattern. The switching device includes an active pattern, a gate insulation layer pattern partially covering the active pattern, a gate electrode on the gate insulation layer pattern, and a source electrode and a drain electrode electrically connected to the active pattern. The alignment pattern has a multi-layered structure and is spaced apart from the switching device on the base substrate. The alignment pattern includes materials which have different transmittances.

A display device is provided including a first substrate comprising a resin material provided with a plurality region provided with a plurality of pixels including a display device, and a second substrate provided facing the first substrate and installed with the pixel region, wherein an outer periphery side surface of the first substrate having a taper shape and including a barrier layer covering an upper layer, lower layer and the outer periphery side surface of the first substrate.

Disclosed are a method for manufacturing a TFT substrate having storage capacitors and the TFT substrate. The method includes: (1) forming a gate terminal and a first metal electrode; (2) forming a gate insulation layer and a gate insulation layer through-hole; (3) forming an oxide semiconductor layer; (4) subjecting a portion of the oxide semiconductor layer to N-type heavy doping to form a first conductor electrode thereby constituting a first storage capacitor; (5) forming an etch stop layer and a first etch stop layer through-hole; (6) forming source/drain terminals and a second metal electrode, thereby constituting a second storage capacitor connected in parallel to the first capacitor; (7) forming a protection layer, a protection layer through-hole, and a second etch stop layer through-hole; and (8) forming a pixel electrode and a second conductor electrode, thereby constituting a third storage capacitor connected in parallel to the second capacitor.

The present invention generally relates to TFTs and methods for fabricating TFTs. For either back channel etch TFTs or for etch stop TFTs, multiple layers for the passivation layer or the etch stop layers permits a very dense capping layer to be formed over a less dense back channel protection layer. The capping layer can be sufficiently dense so that few pin holes are present and thus, hydrogen may not pass through to the semiconductor layer. As such, hydrogen containing precursors may be used for the capping layer deposition.

A highly reliable semiconductor device including an oxide semiconductor is provided. The concentration of impurities contained in an oxide semiconductor of a semiconductor device including the oxide semiconductor is reduced. Electrical characteristics of a semiconductor device including an oxide semiconductor are improved. The semiconductor device includes an oxide semiconductor film; a gate electrode layer overlapping with the oxide semiconductor film; a gate insulating film between the oxide semiconductor film and the gate electrode layer; a metal oxide film overlapping with the gate insulating film with the oxide semiconductor film positioned therebetween; and a source electrode layer and a drain electrode layer electrically connected to the oxide semiconductor film. The metal oxide film covers at least a channel region and a side surface of the oxide semiconductor film.

A semiconductor device includes a first conductor, a second conductor, a first insulator, a second insulator, a third insulator, a semiconductor, and an electron trap layer. The semiconductor includes a channel formation region. The electron trap layer overlaps with the channel formation region with the second insulator interposed therebetween. The first conductor overlaps with the channel formation region with the first insulator interposed therebetween. The second conductor overlaps with the electron trap layer with the third insulator interposed therebetween. The second conductor does not overlap with the channel formation region.

A change in electrical characteristics of a semiconductor device including an interlayer insulating film over a transistor including an oxide semiconductor as a semiconductor film is suppressed. The structure includes a first insulating film which includes a void portion in a step region formed by a source electrode and a drain electrode over the semiconductor film and contains silicon oxide as a component, and a second insulating film containing silicon nitride, which is provided in contact with the first insulating film to cover the void portion in the first insulating film. The structure can prevent the void portion generated in the first insulating film from expanding outward.

A thin film transistor array panel according to an exemplary embodiment of the present invention includes a substrate and a gate electrode disposed on the substrate. A gate insulating layer is disposed on the substrate and covers the gate electrode. A semiconductor layer is disposed on the gate insulating layer and includes a channel region, a source region, and a drain region. The source and drain regions are separated from each other by the channel region. An etch stopper is disposed on the semiconductor layer. A passivation layer is disposed on the semiconductor layer and covers the etch stopper. A source electrode and a drain electrode are disposed on the passivation layer and are respectively connected to the source region and the drain region. The passivation layer includes a first sub-passivation layer including aluminum oxide (AlO.sub.x).

Provided is a thin-film transistor. The thin-film transistor includes: a gate, a first insulative layer, a semiconductor layer, a source and drain layer, a semiconductor modification layer, and a second insulative layer that are disposed on a base substrate and sequentially laminated in a direction away from the base substrate; wherein the source and drain layer includes a source and a drain that are spaced apart and both connected to the semiconductor layer, a portion of the semiconductor layer is exposed from a gap between the source and the drain, and the semiconductor modification layer at least covers the portion of the semiconductor layer exposed from the gap; and a concentration of hydrogen in the semiconductor layer is greater than a concentration threshold, and a temperature of a reaction chamber in manufacturing the thin-film transistor is less than a temperature threshold.