A transistor having normally-off characteristics included in the nitride semiconductor device includes a gate insulating film provided on a first surface side of the nitride semiconductor substrate, a gate electrode provided on the gate insulating film, a p-type layer located to be opposed to the gate electrode with the gate insulating film interposed, and an n-type layer located to be opposed to the gate electrode with the p-type layer interposed so as to be in contact with the p-type layer. A Mg concentration in the p-type layer is 110.sup.18 cm.sup.3 or higher and 110.sup.20 cm.sup.3 or lower. The inequalities (1) and (2) are fulfilled, where an effective acceptor concentration of the p-type layer is Np (cm.sup.3), a thickness of the p-type layer is dp (nm), an effective donor concentration of the n-type layer is Nn (cm.sup.3), and a thickness of the n-type layer is dn (nm).

Methods for making reverse-blocking insulated gate bipolar transistors and associated structures. A first and a second silicon wafer substrates are provided and bonded. One or more separation diffusion regions are formed in the first silicon wafer substrate. One or more front side metal-oxide semiconductor (MOS) structures are formed on a top surface of the first silicon wafer substrate. The second silicon wafer substrate layer is removed. A contact diffusion layer is formed on a bottom surface of the first silicon wafer substrate. A backside metallization layer is formed on a bottom surface of the contact diffusion layer.

A power device includes a semiconductor substrate having first and second current carrying terminals on respective first and second opposing surfaces thereof. A silicided polysilicon temperature sensor and silicided polysilicon gate electrode are provided on the first surface. A source region of first conductivity type and a shielding region of second conductivity type are provided in the semiconductor substrate. The shielding region forms a P-N rectifying junction with the source region, and extends between the silicided polysilicon temperature sensor and the second current carrying terminal. A field oxide insulating region is provided, which extends between the shielding region and the silicided polysilicon temperature sensor.

A semiconductor device includes, within an outer peripheral region: an outer peripheral p-type layer; an outer peripheral n-type layer positioned on an outer peripheral side relative to the outer peripheral p-type layer with a space from the outer peripheral p-type layer; a high breakdown voltage p-type layer arranged to include a portion of an upper surface of a semiconductor substrate located between the outer peripheral p-type layer and the outer peripheral n-type layer; a drift n-type layer extending up to the upper surface between the high breakdown voltage p-type layer and the outer peripheral n-type layer; a protective electrode disposed above the high breakdown voltage p-type layer via an interlayer insulating film and electrically connected to an upper electrode; and a semi-insulating film covering the upper surface between the protective electrode and the outer peripheral n-type layer and having a resistivity of 110.sup.8 .Math.cm to 110.sup.14 .Math.cm at 25 C.

A semiconductor device includes a semiconductor part, first and second electrodes and a control electrode. The semiconductor part is provided between the first and second electrodes. The control electrode is provided between the semiconductor part and the second electrode. The semiconductor part includes first, third and fifth layers of a first conductivity type, and second, fourth, sixth and seventh layers of a second conductivity type. The second layer is provided between the first layer and the second electrode. The third layer is provided between the second layer and the second electrode. The fourth and fifth layers are provided between the first layer and the first electrode. The sixth layer surrounds the second and third layers. The seventh layer is provided between the first layer and the first electrode. The seventh layer surrounds the fourth and fifth layers and is apart from the fourth and fifth layers.