Semiconductor devices are formed using a thin epitaxial layer (nanotube) formed on sidewalls of dielectric-filled trenches. In one embodiment, a method for forming a semiconductor device includes forming a first epitaxial layer on sidewalls of trenches and forming second epitaxial layer on the first epitaxial layer where charges in the doped regions along the sidewalls of the first and second trenches achieve charge balance in operation. In another embodiment, the semiconductor device includes a termination structure including an array of termination cells.

A method of forming a semiconductor device and a semiconductor device are provided. The method includes providing a wafer stack including a carrier wafer comprising graphite and a device wafer comprising a wide band-gap semiconductor material and having a first side and a second side opposite the first side, the second side being attached to the carrier wafer, defining device regions of the wafer stack, partly removing the carrier wafer so that openings are formed in the carrier wafer arranged within respective device regions and that the device wafer is supported by a residual of the carrier wafer; and further processing the device wafer while the device wafer remains supported by the residual of the carrier wafer.

According to various embodiments, a method may include: structuring a semiconductor region to form a structured surface of the semiconductor region; disposing a dopant in the semiconductor region; and activating the dopant at least partially by irradiating the structured surface at least partially with electromagnetic radiation having at least one discrete wavelength to heat the semiconductor region at least partially.

An insulating layer is formed on a substrate made of silicon carbide. By performing etching using a mask layer formed on the insulating layer, a contact hole is formed in the insulating layer to expose a contact region, which is a portion of a main surface of the substrate. The step of forming the contact hole includes a step of providing the contact region with a surface roughness Ra of not less than 0.5 nm. An electrode layer is formed in contact with the contact region. By heating the electrode layer and the substrate, siliciding reaction is caused between the electrode layer and the contact region.

A silicon carbide semiconductor device, including a silicon carbide semiconductor structure, an insulated gate structure including a gate insulating film contacting the silicon carbide semiconductor structure and a gate electrode formed on the gate insulating film, an interlayer insulating film covering the insulated gate structure, a metal layer provided on the interlayer insulating film for absorbing or blocking hydrogen, and a main electrode provided on the metal layer and electrically connected to the silicon carbide semiconductor structure.

According to various embodiments, a method may include: structuring a semiconductor region to form a structured surface of the semiconductor region; disposing a dopant in the semiconductor region; and activating the dopant at least partially by irradiating the structured surface at least partially with electromagnetic radiation having at least one discrete wavelength to heat the semiconductor region at least partially.

A MOSFET includes: a SiC layer including one main surface and provided with a plurality of contact regions; and a plurality of source electrodes formed in contact with the contact regions. In the MOSFET, in a plan view of the one main surface, a plurality of cells including the contact regions and the source electrodes are formed adjacent to one another, each of the plurality of cells having an outer circumferential shape that is a shape of hexagon including a long axis. According to the MOSFET, a contact resistance between each contact region and each source electrode can be further reduced, thereby attaining a more improved electrical property.

According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, an insulating region, and a third semiconductor region of the first conductivity type. The first semiconductor region is provided between the first electrode and the second electrode, and is in contact with the first electrode. The second semiconductor region is provided between the first semiconductor region and the second electrode. The second semiconductor region is in contact with the second electrode. The insulating region extends in a direction from the second electrode toward the first semiconductor region. The insulating region is in contact with the second electrode. The third semiconductor region is provided between the second semiconductor region and the insulating region.

An electrical device including an opening in a low-k dielectric material, and a copper including structure present within the opening for transmitting electrical current. A liner is present between the opening and the copper including structure. The liner includes a superlattice structure comprised of a metal oxide layer, a metal layer present on the metal oxide layer, and a metal nitride layer that is present on the metal layer. A first layer of the superlattice structure that is in direct contact with the low-k dielectric material is one of said metal oxide layer and a final layer of the superlattice structure that is in direct contact with the copper including structure is one of the metal nitride layers.

There is provided a silicon carbide semiconductor device allowing for integration of a transistor element and a Schottky barrier diode while avoiding reduction of an active region and decrease of a breakdown voltage. A silicon carbide semiconductor device includes a silicon carbide layer. The silicon carbide layer includes: a first region defining an outer circumference portion of an element region in which a transistor element is provided; and a JTE region provided external to the first region in a drift layer and electrically connected to the first region. The first region is provided with at least one opening through which the drift layer is exposed. The silicon carbide semiconductor device further includes a Schottky electrode provided in the opening and forming a Schottky junction with the drift layer.