Patent classifications
H04N5/363
IMAGING ELEMENT, DRIVING METHOD, AND ELECTRONIC DEVICE
A pixel is included, the pixel including a photoelectric conversion portion configured to convert incident light to a charge by photoelectric conversion and accumulate the charge, a charge transfer unit configured to transfer the charge generated in the photoelectric conversion portion, a diffusion layer to which the charge is transferred through the charge transfer unit, the diffusion layer having a predetermined storage capacitance, a conversion unit configured to convert the charge transferred to the diffusion layer to a pixel signal, and connection wiring configured to connect the diffusion layer and the conversion unit. The connection wiring is connected to the diffusion layer and the conversion unit through contact wiring extending in a vertical direction with respect to a semiconductor substrate on which the diffusion layer is formed and is formed closer to the semiconductor substrate than other wiring provided in the pixel.
SEMICONDUCTOR PHOTODETECTION DEVICE, RADIATION COUNTING DEVICE, AND CONTROL METHOD OF SEMICONDUCTOR PHOTODETECTION DEVICE
Noise of signals in an image sensor is reduced. A pixel circuit generates a reset signal of a predetermined initial voltage and an exposure signal of a signal voltage according to an exposure amount of light in order. An analog-digital conversion unit performs a reset sampling process of converting the reset signal into a first digital signal at a predetermined reset sampling interval and an exposure sampling process of converting the exposure signal into a second digital signal at an exposure sampling interval that does not exceed twice the predetermined reset sampling interval in order. A detection unit detects the light based on the first digital signal and a second digital signal.
SIGNAL PROCESSING DEVICE AND METHOD, IMAGING ELEMENT, AND ELECTRONIC DEVICE
The present technology relates to signal processing device and method, an imaging element, and an electronic device capable of reducing a rise of costs. A signal processing device according to the present technology includes a measurement unit that performs measurement of a length of a period from an input start of a signal to a change of a value of the signal a plurality of times, retains measured values obtained by the measurement performed the plurality of times, sets an initial value of the measurement on the basis of any one of a plurality of the retained measured values, and performs the measurement by using the initial value. The present technology is applicable to an electronic circuit such as a flip-flop circuit and an A/D conversion unit, an imaging element such as a CMOS image sensor, and an electronic device such as a digital still camera, for example.
PHOTON COUNTING DEVICE AND PHOTON COUNTING METHOD
A photon counting device includes a plurality of pixels each including a photoelectric conversion element configured to convert input light to charge, and an amplifier configured to amplify the charge converted by the photoelectric conversion element and convert the charge to a voltage, an A/D converter configured to convert the voltages output from the amplifiers of the plurality of pixels to digital values; and a conversion unit configured to convert the digital value output from the A/D converter to the number of photons by referring to reference data, for each of the plurality of pixels, and the reference data is created based on a gain and an offset value for each of the plurality of pixels.
Ramp-type analogue-digital conversion, with multiple conversions or single conversion, depending on the light level received by a pixel
In a matrix image sensor, a method of reading a pixel of a column allows two modes of analogue-digital conversion of the voltage level provided by the column: a first mode in which are carried out a single analogue-digital conversion in a nominal conversion time window F.sub.CONV, of nominal duration d.sub.n and a counting which starts with a ramp of nominal duration d.sub.n and stops upon the toggling of the output S.sub.CMP of the comparator; and a second mode which provides for multiple conversions by comparison with a ramp of reduced duration d.sub.r, in the same nominal conversion time window. The selection of the mode of conversion to be applied is based on the observation of the state of the output S.sub.CMP of the comparator after a predetermined duration after the instant t.sub.i of ramp start: if the output has toggled, the useful level to be converted represents a low light level to which the second mode with multiple conversions will be applied; if the output has not toggled, the useful level to be converted represents a high light level and the first, conventional, mode with single conversion will be applied. The invention makes it possible to improve the signal-to-noise ratio at the output of the sensor, for low light levels, by decreasing the amount of the Gaussian noise due to the circuits of the conversion chain.
Ramp signal generator and CMOS image sensor using the same
A ramp signal generator and a CMOS image sensor using the same are disclosed. The ramp signal generator includes a reference voltage generation unit that generates a reference voltage, a gain adjustment unit that adjusts a gain in cooperation with the reference voltage generation unit, a ramp bias voltage sampling unit that samples a ramp bias voltage of the gain adjustment unit, and a ramp signal generation unit that generates a ramp signal according to the ramp bias voltage sampled in the ramp bias voltage sampling unit.
ENDOSCOPE
An endoscope includes: an image sensor including: pixels for receiving light to generate image signals, and reading circuits sharing predetermined number of pixels with one another; a format converter configured to convert the image signals output from the image sensor into a predetermined format corresponding to a processing device for performing image processing on the image signals; and a connector including the format converter and configured to be connected to the processing device. The image sensor includes a color filter of a Bayer array in which a red filter for passing a red component and a first green filter for passing a green component are alternately arranged in even lines of horizontal lines of the pixels, and a second green filter for passing a green component and a blue filter for passing a blue component are alternately arranged in odd lines of the horizontal lines.
SINGLE-ENDED CAPACITIVE TRANS-IMPEDANCE AMPLIFIER (CTIA) UNIT CELL INCLUDING SHARED CLAMP CAPACITOR CIRCUIT FOR TWO-COLOR IMAGING
A capacitive trans-impedance amplifier (CTIA) unit cell includes a CTIA and a clamp capacitor. The CTIA is configured to process a first electrical charge induced by a photocurrent. The clamp capacitor includes a first clamp terminal configured to receive a dynamic signal and a second clamp terminal connected to a CTIA output of the CTIA so as to establish an integrating node. The clamp capacitor delivers a second electrical charge to the CTIA in response to receiving the dynamic signal so as to adjust an integrating reset level at the integrating node.
SOLID-STATE IMAGING DEVICE, AD CONVERTER, AND ELECTRONIC APPARATUS
The present disclosure relates to a solid-state imaging device, an AD converter, and an electronic apparatus that improve a crosstalk characteristic. The AD converter includes a comparator that compares the pixel signal with the reference signal, a pixel signal side capacitor, and a reference signal side capacitor. The pixel signal side capacitor and the reference signal side capacitor are formed such that a first parasitic capacity, and a second parasitic capacity are substantially the same. The present technology is applicable to a CMOS image sensor, for example.
IMAGE SENSOR AND ELECTRONIC DEVICE WITH ACTIVE RESET CIRCUIT, AND METHOD OF OPERATING THE SAME
An image sensor including a pixel circuit and an active reset circuit. The pixel circuit includes a light sensing element, a storage node selectively connected to the light sensing element, an output transistor configured to, during a readout operation, output a signal that is based on a potential of the charge storage node to an output line, and a selection transistor that controls the readout operation. The active reset circuit includes a first current path and a second current path, the first current path extending from a power supply node to the output line via the selection transistor and the output transistor, and the second current path extending from the power supply node to the output line via a first transistor and a second transistor. The active reset circuit is configured to, when the selection transistor and the first transistor are both ON, set a potential of the charge storage node based on a potential of a gate of the second transistor.