Imaging apparatus (20) includes a photosensitive medium (22) and a bias electrode (32), which is at least partially transparent, overlying the photosensitive medium. An array of pixel circuits (26) is formed on a semiconductor substrate (30). Each pixel circuit includes a pixel electrode (24) coupled to collect the charge carriers from the photosensitive medium; a readout circuit (75) configured to output a signal indicative of a quantity of the charge carriers collected by the pixel electrode; a skimming gate (48) coupled between the pixel electrode and the readout circuit; and a shutter gate (46) coupled in parallel with the skimming gate between a node (74) in the pixel circuit and a sink site. The shutter gate and the skimming gate are opened sequentially in each of a sequence of image frames so as to apply a global shutter to the array and then to read out the collected charge carriers via the skimming gate to the readout circuit.

A plurality of pairs of image signals each constituted by a first signal obtained by performing photoelectric conversion on light flux that passes through a first pupil area in the exit pupil of an imaging optical system and a second signal obtained by performing photoelectric conversion on light flux that passes through a second pupil area are generated. The plurality of pairs of signals differ in the correlation amount of noise components of the first and second signals constituting the pairs of signals. One of defocus amounts obtained from the pairs of signals is used to adjust the focus distance of the imaging optical system. Accordingly, a focus detection device that can suppress the influence of correlated noise included in the pairs of image signals on focus detection and a control method thereof are obtained.

Each unit pixel includes a photoelectric converter formed above a semiconductor region, an amplifier transistor formed in the semiconductor region, and including a gate electrode connected to the photoelectric converter, a reset transistor configured to reset a potential of the gate electrode, and an isolation region formed in the semiconductor region between the amplifier transistor and the reset transistor to electrically isolate the amplifier transistor from the reset transistor. The amplifier transistor includes a source/drain region. The source/drain region has a single source/drain structure.

A pixel is included, the pixel including a photoelectric conversion portion configured to convert incident light to a charge by photoelectric conversion and accumulate the charge, a charge transfer unit configured to transfer the charge generated in the photoelectric conversion portion, a diffusion layer to which the charge is transferred through the charge transfer unit, the diffusion layer having a predetermined storage capacitance, a conversion unit configured to convert the charge transferred to the diffusion layer to a pixel signal, and connection wiring configured to connect the diffusion layer and the conversion unit. The connection wiring is connected to the diffusion layer and the conversion unit through contact wiring extending in a vertical direction with respect to a semiconductor substrate on which the diffusion layer is formed and is formed closer to the semiconductor substrate than other wiring provided in the pixel.

The present technology relates to a signal processing device, an imaging element, and an electronic apparatus configured so that a cost increase can be suppressed. A signal processing device of the present technology includes: a comparison unit configured to compare a signal level of an analog signal with a signal level of a reference signal; a selection unit configured to select, from a plurality of reference signals, the reference signal to be supplied to the comparison unit; and a switching unit capable of switching a signal line connected to an input terminal of the comparison unit such that a signal line via which the reference signal selected by the selection unit is transmitted is connected to the input terminal of the comparison unit, wherein the comparison unit includes a floating node as the input terminal, the selection unit includes a signal line in which a parasitic capacitance is caused between the signal line and the floating node as the input terminal of the comparison unit, and the signal line of the selection unit is configured to transmit an identical level of signal in multiple comparison processes performed by the comparison unit. The present technology is applicable to, e.g., an imaging element and an electronic apparatus.

The present technology relates to an image-capturing device and an electronic apparatus that are capable of reducing kTC noise. A sample-hold unit that performs sampling and holding of a pixel signal, an analog-digital (AD) conversion unit that performs AD conversion of the pixel signal, and a setting unit that sets a transconductance of an operational amplifier included in the sample-hold unit to a transconductance where kTC noise is minimized are included. Alternatively, a sample-hold unit that performs sampling and holding of a pixel signal, a kTC cancellation unit that reduces kTC noise in the sample-hold unit, an analog-digital (AD) conversion unit that performs AD conversion of the pixel signal, and a setting unit that sets a capacitance value of a capacitor included in the kTC cancellation unit to a capacitance value where the kTC noise is minimized are included.

Imaging pixels may be operated in a rolling shutter scanning mode. Charge signal that is generated on a first chip may be capacitively coupled to signal processing circuits on a second chip. A capacitor may be placed in the signal path that provides signal coupling between the chips and stores overflow charge from pixels that have been exposed to high light level illumination. This enables high dynamic range using only a single charge integration time. The pixel may include an in-pixel negative feedback amplifier. The chip-to-chip electrical connections between the first and second chips may be realized at each pixel as a hybrid bond with a single bond per pixel. Image sensors fabricated using this technology may have small size pixels, high resolution, high dynamic range, and a single charge integration time.

An imaging apparatus includes a pixel that generates charge; an integral amplifier that integrates charge transferred from the pixel; a low pass filter to which output of the integral amplifier is supplied and whose time constant is variable; first and second sample-and-hold circuits that sample and hold output of the low pass filter before and after the charge is transferred from the pixel to the integral amplifier, respectively; a differential circuit that outputs a difference between signals held by the first and second sample-and-hold circuits; and a control circuit that changes the time constant. The control circuit decreases the time constant after the sampling by the first sample-and-hold circuit ends, and increases the time constant in the middle of the sampling by the second sample-and-hold circuit.

A direct TOF optic sensor is based on CMOS pixels, wherein a pixel structure comprises a photodetector PhD, a non linear resistance R and a transfer MOS transistor in series, and delivers an output signal at a sensing node SN between the resistor and the transfer transistors. The photogenerated current is continuously drained into the nonlinear resistance and converted to a voltage signal by the RC circuit formed by the nonlinear resistance and a capacitance at the sense node SN. The voltage signal is continuously transmitted to a readout circuitry 300 having a fast analog to digital converter. The RC circuit within the pixel structure has a low pass filtering function and a high frequency integrating function, so that noise, in particular thermal noise due to the nonlinear resistance is mainly shifted in a low frequency range, separate from a high frequency range of the main signal component corresponding to a pulse light signal received at the photodetector. The main signal component is recovered by means of one of a band pass or high pass filter F implemented in the readout circuitry, that increases the signal to noise ratio in the high frequency range.

A photon counting device includes a plurality of pixels each including a photoelectric conversion element configured to convert input light to charge, and an amplifier configured to amplify the charge converted by the photoelectric conversion element and convert the charge to a voltage, an A/D converter configured to convert the voltages output from the amplifiers of the plurality of pixels to digital values; and a conversion unit configured to convert the digital value output from the A/D converter to the number of photons by referring to reference data, for each of the plurality of pixels, and the reference data is created based on a gain and an offset value for each of the plurality of pixels.