In an example, a semiconductor device includes a first steering diode and a second steering diode at a top side of a region of semiconductor material, a first Zener diode buried within the region of semiconductor material, and a second Zener diode at a bottom side of the region of semiconductor material. The semiconductor device is configured as a bi-directional electrostatic discharge (ESD) structure. The first Zener diode and the first steering diodes are configured to respond to a positive ESD pulse, and the second Zener diode and the second steering diode are configured to respond to a negative ESD pulse. The steering diodes are configured to have low capacitances and the Zener diodes are configured to provide enhanced ESD protection. Other related examples and methods are disclosed herein.

In an example, a semiconductor device includes a first steering diode and a second steering diode at a top side of a region of semiconductor material, a first Zener diode buried within the region of semiconductor material, and a second Zener diode at a bottom side of the region of semiconductor material. The semiconductor device is configured as a bi-directional electrostatic discharge (ESD) structure. The first Zener diode and the first steering diodes are configured to respond to a positive ESD pulse, and the second Zener diode and the second steering diode are configured to respond to a negative ESD pulse. The steering diodes are configured to have low capacitances and the Zener diodes are configured to provide enhanced ESD protection. Other related examples and methods are disclosed herein.

Examples of low capacitance bidirectional and unidirectional electrostatic discharge (ESD) protection devices for high voltage (e.g., 15 kV, 30 kV) applications are provided. Such devices include a circuit of a diode and a Zener diode coupled via their anodes to form an NPN structure and another, low capacitance diode coupled in series with the NPN structure. Such circuit may be configured on each of two dies, and the circuits coupled via wire bonds. Additional wire bonds may be used to respectively couple two pins of the device to the two circuits, or the pins may be coupled to the circuits via respective conductive die attaches. In a multichip module (MCM) topology, the NPN diode structure may be coupled to two low capacitance diodes on one die, and that circuit may be coupled to a third low capacitance diode disposed on another die. Some arrangements employ an insulator in conjunction with a single die. Some arrangements enable FlipChip fabrication technology.

Breakdown diodes and methods of making the same are described. Such a breakdown diode can be fabricated in a semiconductor substrate and have a junction configured to breakdown under a target reverse bias applied across the junctions. The junction is located below the surface of the substrate by a distance suitable for ameliorating mechanical stress impact to the reverse bias breakdown voltage of the junction. Moreover, the junction is located away from an interface causing noise issues.

Breakdown diodes and methods of making the same are described. Such a breakdown diode can be fabricated in a semiconductor substrate and have a junction configured to breakdown under a target reverse bias applied across the junctions. The junction is located below the surface of the substrate by a distance suitable for ameliorating mechanical stress impact to the reverse bias breakdown voltage of the junction. Moreover, the junction is located away from an interface causing noise issues.

A semiconductor device includes a semiconductor package including an n-type channel normally-off transistor including a first electrode, a second electrode, and a first control electrode, a normally-on transistor including a third electrode electrically connected to the second electrode, a fourth electrode, and a second control electrode, a first diode including a first anode electrically connected to the second control electrode and a first cathode electrically connected to the third electrode, and a Zener diode including a second anode electrically connected to the first electrode and a second cathode electrically connected to the second electrode; a first terminal provided on the semiconductor package, the first terminal being electrically connected to the first electrode; a plurality of second terminals provided on the semiconductor package, the second terminals being electrically connected to the first electrode, and the second terminals being lined up in a first direction; a third terminal provided on the semiconductor package, the third terminal being electrically connected to the fourth electrode; a plurality of fourth terminals provided on the semiconductor package, the fourth terminals being electrically connected to the first control electrode; and a plurality of fifth terminals provided on the semiconductor package, the fifth terminals being electrically connected to the second control electrode, and the fifth terminals being lined up in the first direction.

A semiconductor device includes a semiconductor package including an n-type channel normally-off transistor including a first electrode, a second electrode, and a first control electrode, a normally-on transistor including a third electrode electrically connected to the second electrode, a fourth electrode, and a second control electrode, a first diode including a first anode electrically connected to the second control electrode and a first cathode electrically connected to the third electrode, and a Zener diode including a second anode electrically connected to the first electrode and a second cathode electrically connected to the second electrode; a first terminal provided on the semiconductor package, the first terminal being electrically connected to the first electrode; a plurality of second terminals provided on the semiconductor package, the second terminals being electrically connected to the first electrode, and the second terminals being lined up in a first direction; a third terminal provided on the semiconductor package, the third terminal being electrically connected to the fourth electrode; a plurality of fourth terminals provided on the semiconductor package, the fourth terminals being electrically connected to the first control electrode; and a plurality of fifth terminals provided on the semiconductor package, the fifth terminals being electrically connected to the second control electrode, and the fifth terminals being lined up in the first direction.

The present invention provides a Zener diode and a manufacturing method, which includes: a substrate; a buried layer formed on at least a part of a first surface of the substrate; an epitaxial layer formed on at least the buried layer; and a diffusion layer formed on at least the epitaxial layer; wherein there is a distance between the diffusion layer and the buried layer.

The present invention provides a Zener diode and a manufacturing method, which includes: a substrate; a buried layer formed on at least a part of a first surface of the substrate; an epitaxial layer formed on at least the buried layer; and a diffusion layer formed on at least the epitaxial layer; wherein there is a distance between the diffusion layer and the buried layer.

A semiconductor substrate includes a p-type substrate region, an n-type buried layer on the p-type substrate region, and a p-type semiconductor layer on the n-type buried layer. A DTI region is formed in a trench that penetrates through the p-type semiconductor layer and the n-type buried layer, reaching the p-type substrate region. A plurality of scallops are formed at a side surface of the trench. A size of each of a plurality of first scallops formed at the side surface of the trench in the p-type semiconductor layer is larger than a size of each of a plurality of second scallops formed at the side surface of the trench in the n-type buried layer.