A circuit can include a transistor, a capacitive element, and a rectifying element. The rectifying element and the capacitive element can be serially connected and coupled to the current-carrying terminals of the transistor. An electronic device may include part of the circuit. The electronic device can include a diode that includes a horizontally-oriented semiconductor member and a vertically-oriented semiconductor member having different conductivity types. The ends of the horizontally-oriented semiconductor and vertically-oriented semiconductor members physically contact each other. A process of forming an electronic device can include forming a semiconductor layer and forming a second semiconductor member. In a finished device, a diode includes a junction between dopants of first and second conductivity types within the semiconductor layer, within the semiconductor member, or at an interface between the semiconductor layer and the semiconductor member.

The present overcurrent protective device comprises an input terminal configured to receive a power supply voltage, an output terminal, a switch, a detector, and a controller. The switch is provided between the input terminal and the output terminal. The detector is configured to output a limitation signal without delay when a current flowing through the switch exceeds a prescribed tolerance value. The controller is configured to receive the limitation signal and control the switch to prevent the current from exceeding the tolerance value. The detector is configured output a turn-off signal to the controller when a first state continues for a delay time determined depending on the current's magnitude. The first state is a state where the current is smaller than the tolerance value and the current exceeds a first threshold value smaller than the tolerance value. The controller turns off the switch in response to the turn-off signal.

An example arrangement includes a semiconductor device having at least two vertical diode devices spaced from one another by isolation trenches. Each of the vertical diode devices includes: a first diffusion region of a first P-type or N-type conductivity formed in a device side surface of the semiconductor die, the first diffusion region extending into a first epitaxial layer of a second P-type or N-type conductivity opposite the first conductivity type; the first epitaxial layer formed over a semiconductor substrate of the first P-type or N-type conductivity. The semiconductor substrate includes a backside surface facing away from the device side surface of the semiconductor die; metal contacts on the device side surface of the semiconductor die are electrically coupled to the first diffusion region; and stud bumps formed on the metal contacts and arranged to form terminals of the semiconductor device.

A switch arrangement comprising: a bi-directional metal-oxide-semiconductor, MOS, switch having a drain, source and gate and a body; a first circuit coupled between the drain, the gate and the source for providing electrostatic discharge protection; a first transistor having a source coupled to the body of the MOS switch, a drain coupled to the source of the MOS switch and a gate coupled to the gate of the MOS switch; and a second circuit for providing electrostatic discharge protection comprising a first diode of Zener diode type having an anode coupled to the body of the MOS switch and a cathode coupled to the source, and a second transistor having a source coupled to the body of the MOS switch, a drain coupled to the source of the MOS switch and a gate coupled to the anode of the first diode.

The monitoring device is configured for monitoring a converter comprising a first and a second input terminals, two output terminals, a first filter branch connected between the input terminals, a second filter branch connected in parallel with the first branch, two switching branches connected in parallel with the second branch, each switching branch including two switching half-branches connected in series and in an intermediate point forming an output terminal. The monitoring device comprises a detection impedance configured for being connected between the first and the second branches, and a detection module configured for comparing the voltage across the detection impedance with a predefined threshold, then for generating a detection signal as soon as said voltage is greater than said threshold.

The monitoring device is configured for monitoring a converter comprising a first and a second input terminals, two output terminals, a first filter branch connected between the input terminals, a second filter branch connected in parallel with the first branch, two switching branches connected in parallel with the second branch, each switching branch including two switching half-branches connected in series and in an intermediate point forming an output terminal. The monitoring device comprises a detection impedance configured for being connected between the first and the second branches, and a detection module configured for comparing the voltage across the detection impedance with a predefined threshold, then for generating a detection signal as soon as said voltage is greater than said threshold.

A power semiconductor device includes: a semiconductor body that conducts a load current between first and second load terminals at opposite first and second sides; a drift region of a first conductivity type; trenches extending from the first side towards the second side and each including a trench electrode; mesas laterally confined by the trenches and each including first and second type mesas; and semiconductor structures each including a serial connection of a first region of the first conductivity type coupled to or formed by the drift region, a second region of a second conductivity type and a third region of the first conductivity type coupled to the first load terminal by at least one of a first ohmic resistor and a Zener diode. Each first type mesa is electrically connected to the first load terminal and devoid of the semiconductor structures which are arranged in the second type mesas.

A semiconductor device including: a semiconductor substrate; a temperature sensing unit provided on a front surface of the semiconductor substrate; an anode pad and a cathode pad electrically connected with the temperature sensing unit; a front surface electrode being set to a predetermined reference potential; and a bidirectional diode unit electrically connected in a serial bidirectional way between the cathode pad and the front surface electrode is provided. The bidirectional diode unit may be arranged between the anode pad and the cathode pad on the front surface.

The present disclosure provides a chip part. The chip part includes: a substrate, a first external electrode and a second external electrode, a capacitor portion disposed on a first main surface of the substrate, a lower electrode including a drawer portion drawn out to the first main surface, a capacitive film disposed on the lower electrode, an upper electrode disposed on the capacitive film, a first electrode film electrically connecting the first external electrode to the lower electrode, and a second electrode film electrically connecting the second external electrode to the upper electrode. The drawer portion includes a first portion disposed in a region between the first external electrode and the second external electrode, and the first electrode film includes a first lower contact portion connected to the first portion.

A transient voltage suppressor is disclosed that includes an electrode, a substrate disposed on the electrode, the substrate having a first doping, an epitaxial layer disposed on the substrate, the epitaxial layer having a second doping that is different from the first doping, a channel formed in the epitaxial layer having a width W, a length L and a plurality of curved regions, the channel forming a plurality of adjacent sections, the channel having a third doping that is different from the first doping and the second doping and a metal layer formed on top of the channel and contained within the width W of the channel.