There is provided a semiconductor device comprising: a semiconductor substrate including a first-conductivity-type drift region, a first-conductivity-type emitter region provided above the drift region inside the semiconductor substrate and having a doping concentration higher than the drift region; a second-conductivity-type base region provided between the emitter and drift regions inside the semiconductor substrate; a first-conductivity-type accumulation region provided between the base and drift regions inside the semiconductor substrate and having a doping concentration higher than the drift region; and trench portions provided from an upper surface to an inside of the semiconductor substrate and including gate and dummy trench portions. In a mesa portion sandwiched by two trench portions, one of which is the gate trench portion, a depth of the accumulation region from the upper surface reaches a range of bottom of a depth of the gate trench portion.

There is provided a semiconductor device comprising: a semiconductor substrate including a first-conductivity-type drift region, a first-conductivity-type emitter region provided above the drift region inside the semiconductor substrate and having a doping concentration higher than the drift region; a second-conductivity-type base region provided between the emitter and drift regions inside the semiconductor substrate; a first-conductivity-type accumulation region provided between the base and drift regions inside the semiconductor substrate and having a doping concentration higher than the drift region; and trench portions provided from an upper surface to an inside of the semiconductor substrate and including gate and dummy trench portions. In a mesa portion sandwiched by two trench portions, one of which is the gate trench portion, a depth of the accumulation region from the upper surface reaches a range of bottom of a depth of the gate trench portion.

The present inventive concept relates to a spin qubit transistor (100) comprising a base layer (102), a first qubit comprising, a first computing semiconductor island (106) and a first readout semiconductor island (108) arranged with a distance in the range of 3-10 nm therebetween, a second qubit comprising, a second computing semiconductor island (110) and a second readout semiconductor island (112) arranged with a distance in the range of 3-10 nm therebetween, wherein each of said semiconductor islands has a size causing each of said semiconductor islands to exhibit 3-dimensional quantum confinement of a single electron hole, and wherein each of said semiconductor islands forms a semiconductor heterojunction with the base layer. Each of the semiconductor islands has a corresponding gate (G1-G4), for modulation of the computing islands or readout of the readout islands. Said first computing semiconductor island and said second computing semiconductor island are configured to have a unique resonance frequency respectively. A control electrode arrangement (B) between the computing and the readout islands controls the coupling between the qubits. The present inventive concept further comprises a method for forming a spin qubit transistor and a quantum computer comprising at least one spin qubit transistor.

A semiconductor device includes a semiconductor substrate having an element region and an outer peripheral region around the element region, and an upper electrode in contact with an upper surface the semiconductor substrate in the element region. The element region includes a p-type main region in contact with the upper electrode, and an n-type element drift region below the main region. The outer peripheral region includes a plurality of p-type guard rings disposed in multiple ring shapes surrounding the element region, a plurality of n-type spacing regions disposed between the guard rings, and an n-type outer drift region continuous with the element drift region and located below the guard rings and the spacing regions. At least one of the spacing regions is a high concentration spacing region having an n-type impurity concentration higher than that of the element drift region.

A semiconductor device including a transistor portion and a diode portion, including a plurality of trench portions provided at a front surface of a semiconductor substrate, a drift region of a first conductivity type provided in the semiconductor substrate, a base region of a second conductivity type provided above the drift region, an emitter region of the first conductivity type provided above the base region and having a doping concentration higher than that of the drift region, a contact region of the second conductivity type provided above the base region with a doping concentration higher than the base region, an injection suppression region provided at the front surface of the semiconductor substrate, and an emitter electrode provided above the semiconductor substrate, in which the transistor portion has a main region for performing transistor operation, and the injection suppression region is provided in the main region of the transistor portion.

Heterostructures having germanium-seeded, shear-strained silicon quantum wells are provided. Also provided are gate-controlled qubits based on the heterostructures, and quantum computing systems based on the qubits. The heterostructures include a quantum well of germanium-seeded silicon positioned between two quantum barriers of germanium or a silicon-germanium alloy. The silicon of the quantum well is under a shear strain and is seeded with germanium such that the germanium concentration in the quantum well has an oscillating profile.

Disclosed is a display device including a transistor showing extremely low off current. In order to reduce the off current, a semiconductor material whose band gap is greater than that of a silicon semiconductor is used for forming a transistor, and the concentration of an impurity which serves as a carrier donor of the semiconductor material is reduced. Specifically, an oxide semiconductor whose band gap is greater than or equal to 2 eV, preferably greater than or equal to 2.5 eV, more preferably greater than or equal to 3 eV is used for a semiconductor layer of a transistor, and the concentration of an impurity which serves as a carrier donor included is reduced. Consequently, the off current of the transistor per micrometer in channel width can be reduced to lower than 10 zA/m at room temperature and lower than 100 zA/m at 85 C.

Disclosed is a display device including a transistor showing extremely low off current. In order to reduce the off current, a semiconductor material whose band gap is greater than that of a silicon semiconductor is used for forming a transistor, and the concentration of an impurity which serves as a carrier donor of the semiconductor material is reduced. Specifically, an oxide semiconductor whose band gap is greater than or equal to 2 eV, preferably greater than or equal to 2.5 eV, more preferably greater than or equal to 3 eV is used for a semiconductor layer of a transistor, and the concentration of an impurity which serves as a carrier donor included is reduced. Consequently, the off current of the transistor per micrometer in channel width can be reduced to lower than 10 zA/m at room temperature and lower than 100 zA/m at 85 C.

A quantum dot including a Group IIIA element and a Group VA element of the periodic table of elements, wherein the quantum dot has an absorption peak wavelength of greater than or equal to about 1,000 nm in a visible-infrared (Vis-IR) absorption spectrum, and includes a ligand derived from an aliphatic hydrocarbon compound substituted with a hydroxyl group (OH) and a thiol group (SH) on its surface, a method for preparing the quantum dot, and an electronic device including the quantum dot.

A quantum dot including a Group IIIA element and a Group VA element of the periodic table of elements, wherein the quantum dot has an absorption peak wavelength of greater than or equal to about 1,000 nm in a visible-infrared (Vis-IR) absorption spectrum, and includes a ligand derived from an aliphatic hydrocarbon compound substituted with a hydroxyl group (OH) and a thiol group (SH) on its surface, a method for preparing the quantum dot, and an electronic device including the quantum dot.