There is provided a solid-state imaging device including: a first semiconductor layer including a photoelectric converter and an electric charge accumulation section for each pixel, the electric charge accumulation section in which a signal electric charge generated in the photoelectric converter is accumulated; a pixel separation section that is provided in the first semiconductor layer, and partitions a plurality of the pixels from each other; a second semiconductor layer that is provided with a pixel transistor and is stacked on the first semiconductor layer, the pixel transistor that reads the signal electric charge of the electric charge accumulation section; and a first shared coupling section that is provided between the second semiconductor layer and the first semiconductor layer, and is provided to straddle the pixel separation section and is electrically coupled to a plurality of the electric charge accumulation sections.

Various embodiments of the present disclosure are directed towards an image sensor. The image sensor includes a deep trench isolation (DTI) structure disposed in a substrate. A pixel region of the substrate is disposed within an inner perimeter of the DTI structure. A photodetector is disposed in the pixel region of the substrate. A gate electrode structure overlies, at least partially, the pixel region of the substrate. A first gate dielectric structure partially overlies the pixel region of the substrate. A second gate dielectric structure partially overlies the pixel region of the substrate. The gate electrode structure overlies both a portion of the first gate dielectric structure and a portion of the second gate dielectric structure. The first gate dielectric structure has a first thickness. The second gate dielectric structure has a second thickness that is greater than the first thickness.

A highly functional photoelectric conversion element is provided. The photoelectric conversion element includes: a first photoelectric converter that detects light in a first wavelength range and photoelectrically converts the light; a second photoelectric converter that detects light in a second wavelength range and photoelectrically converts the light to obtain distance information of a subject; and an optical filter that is disposed between the first photoelectric converter and the second photoelectric converter, and allows the light in the second wavelength range to pass therethrough more easily than the light in the first wavelength range. The first photoelectric converter includes a stacked structure and an electric charge accumulation electrode. The stacked structure includes a first electrode, a first photoelectric conversion layer, and a second electrode that are stacked in order, and the electric charge accumulation electrode is disposed to be separated from the first electrode and be opposed to the first photoelectric conversion layer with an insulating layer interposed therebetween.

An imaging device that smoothly transfers electric charges from a photoelectric converter to a transfer destination is provided. This imaging device includes: a semiconductor layer; a photoelectric converter that generates electric charges corresponding to a received light amount; and a transfer section that includes a first trench gate and a second trench gate and transfers the electric charges from the photoelectric converter to a single transfer destination via the first trench gate and the second trench gate, the first trench gate and the second trench gate each extending from the front surface to the back surface of the semiconductor layer into the photoelectric converter. The first trench gate has a first length from the front surface to the photoelectric converter, and the second trench gate has a second length from the front surface to the photoelectric converter, the second length being shorter than the first length.

An image sensor. Implementations may include: a first die including a plurality of pixels; a second die including a plurality of transistors, capacitors, or both transistors and capacitors; a third die including analog circuitry, logic circuitry, or analog and logic circuitry. The first die may be hybrid bonded to the second die, and the second die may be fusion bonded to the third die. The plurality of transistors, capacitors or transistors and capacitors of the second die may be adapted to enable operation of the plurality of pixels of the first die. The analog circuitry, logic circuitry, and analog circuitry and logical circuitry may be adapted to perform signal routing.

A method for manufacturing a back-side illumination (BSI) complementary metal-oxide-semiconductor (CMOS) image sensor with a vertical transfer gate structure for improved quantum efficiency (QE) and global shutter efficiency (GSE) is provided. A sacrificial dielectric layer is formed over a semiconductor region. A first etch is performed into the sacrificial dielectric layer to form an opening exposing a photodetector in the semiconductor region. A semiconductor column is formed in the opening. A floating diffusion region (FDR) is formed over the semiconductor column and the sacrificial dielectric layer. A second etch is performed into the sacrificial dielectric layer to remove the sacrificial dielectric layer, and to form a lateral recess between the FDR and the photodetector. A gate is formed filling the lateral recess and laterally spaced from the semiconductor column by a gate dielectric layer. The BSI CMOS image sensor resulting from the method is also provided.

A solid-state image pickup device includes a semiconductor substrate in which photoelectric conversion units are arranged. An insulator is disposed on the semiconductor substrate. The insulator has holes associated with the respective photoelectric conversion units. Members are arranged in the respective holes. A light-shielding member is disposed on the opposite side of one of the members from the semiconductor substrate, such that only the associated photoelectric conversion unit is shielded from light. In the solid-state image pickup device, the holes are simultaneously formed and the members are simultaneously formed.

A solid-state imaging device includes a plurality of photoelectric conversion portions each provided in a semiconductor substrate and receives incident light through a light sensing surface, and a pixel separation portion provided to electrically separate a plurality of pixels. At least a pinning layer and a light shielding layer are provided in an inner portion of a trench provided on a side portion of each of the photoelectric conversion portions in an incident surface side, the trench includes a first trench and a second trench formed to be wider than the first trench in a portion shallower than the first trench, the pinning layer is formed in an inner portion of the first trench to cover an inside surface of the second trench, and the light shielding layer is formed to bury an inner portion of the second trench at least via the pinning layer.

A solid-state imaging device includes a plurality of photoelectric conversion portions each provided in a semiconductor substrate and receives incident light through a light sensing surface, and a pixel separation portion provided to electrically separate a plurality of pixels. At least a pinning layer and a light shielding layer are provided in an inner portion of a trench provided on a side portion of each of the photoelectric conversion portions in an incident surface side, the trench includes a first trench and a second trench formed to be wider than the first trench in a portion shallower than the first trench, the pinning layer is formed in an inner portion of the first trench to cover an inside surface of the second trench, and the light shielding layer is formed to bury an inner portion of the second trench at least via the pinning layer.

A semiconductor device including a first material layer adjacent to a second material layer, a first via passing through the first material layer and extending into the second material layer, and a second via extending into the first material layer, where along a common cross section parallel to an interface between the two material layers, the first via has a cross section larger than that of the second via.