Patent classifications
H10D30/0229
Semiconductor device and a method of fabricating the same with increased effective width of the channel without increasing the width of the gate active region
A semiconductor device includes a substrate, a gate structure, a first doped region and a second doped region. The substrate has a plurality of recesses therein. A gate structure covers the plurality of recesses and a surface of the substrate between the plurality of recesses. The gate structure includes a gate dielectric layer and a gate conductive layer. The gate dielectric layer covers bottom surfaces and sidewalls of the plurality of recesses and the surface of the substrate between the plurality of recesses. The gate conductive layer is formed on the gate dielectric layer, fills in the plurality of recesses and covers the surface of the substrate between the plurality of recesses. The first doped region and the second doped region are located at two sides of the gate structure.
SEMICONDUCTOR DEVICE WITH DIPOLE PORTION AND METHOD FOR PREPARING THE SAME
A semiconductor device includes a gate structure disposed over a semiconductor substrate, and a dielectric layer surrounding the gate structure. The semiconductor device also includes a source region and a drain region disposed in the semiconductor substrate and on opposite sides of the gate structure. The semiconductor device further includes a first dipole portion disposed over the semiconductor substrate and covering the source region, and a first dielectric spacer disposed over the first dipole portion and adjacent to the dielectric layer.