A molecular electronic device (10) includes a framework of polynucleotides (3), one or more molecular electronic components (4) and one or more electrical contacts (7). The molecular electronic components and the electrical contacts are each connected to the plurality of polynucleotides such that the molecular electronic components and the electrical contacts are located with respect to the framework and with respect to each other. This forms a coupling between the electrical contacts and the molecular electronic components.

The present disclosure generally relates to multi-switch storage cells (MSSCs), three-dimensional MSSC arrays, and three-dimensional MSSC memory. Multi-switch storage cells include a cell select device, multiple resistive change elements, and an intracell wiring electrically connecting the multiple resistive change elements together and to the cell select device. MSSC arrays are designed (architected) and operated to prevent inter-cell (sneak path) currents between multi-switch storage cells, which prevents stored data disturb from adjacent cells and adjacent cell data pattern sensitivity. Additionally, READ and WRITE operations may be performed on one of the multiple resistive change elements in a multi-switch storage cell without disturbing the stored data in the remaining resistive change elements. However, controlled parasitic currents may flow in the remaining resistive change elements within the cell. Isolating each multi-switch storage cell in a three-dimensional MSSC array, enables in-memory computing for applications such as data processing for machine learning and artificial intelligence.

The current disclosure describes techniques for forming semiconductor structures having multiple semiconductor strips configured as channel portions. In the semiconductor structures, diffusion break structures are formed after the gate structures are formed so that the structural integrity of the semiconductor strips adjacent to the diffusion break structures will not be compromised by a subsequent gate formation process. The diffusion break extends downward from an upper surface until all the semiconductor strips of the adjacent channel portions are truncated by the diffusion break.

An apparatus and method, the apparatus including a charge carrier wherein the charge carrier includes a continuous three dimensional framework including a plurality of cavities throughout the framework; sensor material provided throughout the charge carrier; wherein the sensor material is configured to transduce a detected input and change conductivity of the charge carrier in dependence of the detected input.

A thin film transistor array panel and a manufacturing method are disclosed herein. The thin film transistor array panel includes a data line, a first block of a source electrode, a third block of a drain electrode, and an electrode layer which are formed by a first metal layer disposed on a baseplate; a second block of the source electrode, a fourth block of the drain electrode are formed by a second metal layer which is disposed on the first metal layer. The first block and the second block overlap to combine integrally. The third block and the fourth block overlap to combine integrally. The present invention can decrease the electrical resistance of each of the source electrode and the drain electrode.

A compound is represented by Formula (1): ##STR00001## wherein, each X is independently oxygen, sulfur, or selenium; m is 0 or 1; each n is independently 0 or 1; R.sup.1-R.sup.3 are each independently, for example, hydrogen or alkyl having 1 to 20 carbons; wherein (i) in the case of m=0, it is excluded that all of R.sup.1-R.sup.3 are hydrogen at the same time; (ii) in the case of m=0, n=0 and in the case that m is 0, one of n is 0 and the other is 1, it is excluded that “both of X are sulfur and all R.sup.3s are the same atoms or groups at the same time”; (iii) in the case of m=0, n=1, it is excluded that all R.sup.3s are the same atoms or groups at the same time, and at least one of R.sup.3s is hydrogen.

An organic light emitting diode (OLED) display includes: a substrate; an organic light emitting diode formed on the substrate; a metal oxide layer formed on the substrate and covering the organic light emitting diode; a first inorganic layer formed on the metal oxide layer and covering a relatively larger area than the metal oxide layer; a first organic layer formed on the first inorganic layer and covering a relatively smaller area than the first inorganic layer; and a second inorganic layer formed on the first organic layer, covering a relatively larger area than the first organic layer, and contacting the first inorganic layer at an edge of the second inorganic layer.

A transistor has a substrate, source and drain electrodes on the substrate, the source and drain electrodes formed of a conductor ink having silver nanoparticles with integrated dipolar surfactants, an organic semiconductor forming a channel between the source and drain electrodes, the organic semiconductor in contact with the source and drain electrodes, a gate dielectric layer having a first surface in contact with the organic semiconductor, and a gate electrode in contact with a second surface of the gate dielectric layer, the gate electrode formed of silver nanoparticles with integrated dipolar surfactants.

A structure by which electric-field concentration which might occur between a source electrode and a drain electrode in a bottom-gate thin film transistor is relaxed and deterioration of the switching characteristics is suppressed, and a manufacturing method thereof. A bottom-gate thin film transistor in which an oxide semiconductor layer is provided over a source and drain electrodes is manufactured, and angle θ1 of the side surface of the source electrode which is in contact with the oxide semiconductor layer and angle θ2 of the side surface of the drain electrode which is in contact with the oxide semiconductor layer are each set to be greater than or equal to 20° and less than 90°, so that the distance from the top edge to the bottom edge in the side surface of each electrode is increased.

The present invention provides compounds of formula ##STR00001##
a process for their preparation, a solution comprising these compounds, a process for the preparation of a device using the solution, devices obtainable by the process and the use of the bis-azide-type compounds as cross-linkers.