One or more Zener diodes and a field effect transistor having a drain connected in series with the one or more Zener diodes are integrally formed by a plurality of doped regions in the same P-type semiconductor substrate and separated by a punch through stop region. An N-type region is formed under the one or more Zener diodes.

A diode includes a semiconductor substrate having a surface; a first contact region disposed at the surface of the semiconductor substrate and having a first conductivity type; and a second contact region disposed at the surface, laterally spaced from the first contact region, and having a second conductivity type. The diode also includes a buried region disposed in the semiconductor substrate vertically adjacent to the first contact region, having the second conductivity type, and electrically connected with the second contact region; and an isolation region disposed at the surface between the first and second contact regions. The diode also includes a separation region disposed at the surface between the first contact region and the isolation region, the separation region formed from a portion of a first well region disposed in the semiconductor substrate that extends to the surface.

A semiconductor device has a deep layer with a higher impurity concentration than that of a super junction structure. The deep layer is formed from a position deeper from a surface of a semiconductor layer by a predetermined depth, and comes in contact with a high impurity layer and also comes in contact with the super junction structure. The deep layer overlaps with a portion between a first end which is an outermost peripheral side of a portion that comes in contact with the high impurity layer in a front surface electrode and an end on an outer peripheral side in the high impurity layer when viewed from a substrate normal direction.

A semiconductor device of embodiments includes: a semiconductor layer including a first trench, a second trench, a first semiconductor region of a first conductive type, a second semiconductor region of a second conductive type provided between a first face and the first semiconductor region, between the first trench and the second trench, and in contact with the second trench, a third semiconductor region of a first conductive type provided between the first trench and the second semiconductor region, a fourth semiconductor region of a second conductive type provided between the third semiconductor region and the first face, and a fifth semiconductor region of a second conductive type provided between the second semiconductor region and the first face, spaced from the fourth semiconductor region, in contact with the second trench; a first electrode on a first face side; and a second electrode on a second face side.

In an example, a semiconductor device includes a cathode region having a first conductivity type and a cathode region dopant concentration. A charge storage region overlies the cathode region and has the first conductivity type and a charge storage region dopant concentration less than the cathode region dopant concentration. A buffer region overlies the charge storage region and has the first conductivity type, a buffer region thickness, a buffer region dopant concentration profile, and a buffer region peak dopant concentration. A drift region overlies the buffer region and has the first conductivity type and a drift region dopant concentration. An anode region of a second conductivity type opposite to the first conductivity type is adjacent to the drift region. The buffer region peak dopant concentration is greater than the charge storage region dopant concentration and greater than the drift region dopant concentration. The buffer region peak dopant concentration is spaced apart from the charge storage region and spaced apart from the drift region. Other related examples and methods are disclosed herein.

An electron extraction type free-wheeling diode device and a preparation method thereof are provided by the present disclosure, and more than one first structures for increasing the density of electron extraction pathways are provided on a N-type drift region. Each of the first structures includes a lightly doped P-type base region, a heavily doped N-type emitter region located on the lightly doped P-type base region, a P-type trench anode region, and a trench region located on the P-type trench anode region. The barrier height of the punch-through NPN triode can be tuned in a wide range, which has beneficial effects on soft and fast adjustment of the reverse recovery process.

A semiconductor device includes a diode section. At least some of a plurality of diode mesas in the diode section are coupled to the drift region via a second anode region electrically connected to the emitter terminal of the semiconductor device. The second anode region extends deeper along the vertical direction as compared to trenches in the diode section.

There is provided a semiconductor device (100) including a floating region (202) of a second conductivity type which is arranged below a lower end (43) of a first gate trench portion (40), and which does not extend to a region below a lower end (33) of a first dummy trench portion, at an upper surface side of a semiconductor substrate (10), in which a first mesa portion has an emitter region (12) of a first conductivity type which is provided in contact with the first gate trench portion, and which has a higher concentration than that of a drift region (18), and a base region (14) of the second conductivity type, and the lower end of the first dummy trench portion is in contact with a region of the first conductivity type.

A semiconductor device includes an insulator layer and a semiconductor layer formed on the insulator layer. The semiconductor layer includes a first region of a first conductivity type, a second region of a second conductivity type, and a lightly doped extension region of the first conductivity type separating the first region and the second region along a lateral x-axis. A dielectric structure laterally surrounds the semiconductor layer. At least one of the first region and the lightly doped extension region is formed at a distance to the dielectric structure along a lateral y-axis orthogonal to the x-axis. Along the x-axis and between the second region and the first region, a lateral extension of the semiconductor layer along the y-axis increases with increasing distance to the second region.

An electrostatic discharge (ESD) device may include a semiconductor substrate including a first region, a second region, and a device isolation structure. The first region may include a first impurity region having a first conductivity type, a second impurity region having a second conductivity type opposite the first conductivity type, a first base well, and a first well in the first base well. The device isolation structure may be between the first and second impurity regions. The first base well may surround the first impurity region, the second impurity region, and lower portions of the device isolation structure in the substrate. The first well may have the first conductivity type. The first well may be spaced apart from the device isolation structure in a first direction with a portion of the first base well therebetween.