In an IGBT portion, a first gate electrode is provided in a first trench via a first gate insulating film. A thickness of a first gate insulating film lower portion is thicker than a thickness of a first gate insulating film upper portion, whereby a width of a mesa portion between adjacent first trenches is narrower at a portion of a collector side than at an emitter side. In a diode portion, a second gate electrode is provided inside a second trench via second gate insulating film. A width of the second trench is uniform along a depth direction or narrows from the emitter side toward the collector side. Widths of the second trench are narrower than a sum of a width of the first trench lower portion and the thickness of the first gate insulating film lower portion of both side walls of the first trench lower portion.

Semiconductor devices are formed using a thin epitaxial layer (nanotube) formed on sidewalls of dielectric-filled trenches. In one embodiment, a method for forming a semiconductor device includes forming a first epitaxial layer on sidewalls of trenches and forming second epitaxial layer on the first epitaxial layer where charges in the doped regions along the sidewalls of the first and second trenches achieve charge balance in operation. In another embodiment, the semiconductor device includes a termination structure including an array of termination cells.

A semiconductor device includes a semiconductor substrate having a drift layer, a base layer, a collector layer and a cathode layer. The semiconductor substrate includes a cell region and an outer peripheral region surrounding the cell region. The cell region includes an IGBT region and a diode region. The semiconductor substrate further includes a damage region arranged in the diode region and a part of the outer peripheral region adjacent to a boundary between the outer peripheral region and the diode region. A length, in a longitudinal direction of the diode region, of the part of the outer peripheral region, in which the damage region is arranged, is equal to or more than twice of a thickness of the semiconductor substrate. As a result, recovery characteristic is improved in a portion of the diode region adjacent to the boundary between the outer peripheral region and the diode region.

A semiconductor device, including a semiconductor substrate having a diode portion, wherein the diode portion includes: an anode region which is provided on a front surface of the semiconductor substrate and is of a second conductivity type; a trench portion provided so as to extend in a predetermined extending direction on the front surface of the semiconductor substrate; a trench contact portion provided on the front surface of the semiconductor substrate; and a plug region which is provided at a lower end of the trench contact portion and is of a second conductivity type, and which has a doping concentration higher than that of the anode region, wherein a plurality of plug regions, each of which being the plug region, is provided separately from each other along the extending direction, is provided.

A semiconductor device includes a semiconductor substrate with: a drift layer; a base layer; and a collector layer and a cathode layer. In the semiconductor substrate, when a region operating as an IGBT device is an IGBT region and a region operating as a diode device is a diode region, the IGBT and diode regions are arranged alternately in a repetitive manner; a damaged region is arranged on a surface portion of the diode region in the semiconductor substrate. The IGBT and diode regions are demarcated by a boundary between the collector and cathode layers; and a surface portion of the IGBT region includes: a portion having the damaged region at a boundary side with the diode region; and another portion without the damaged region arranged closer to an inner periphery side relative to the boundary side.

According to one embodiment, in a semiconductor device, The first semiconductor region is provided between the first and the second electrode. The second semiconductor region is provided between the first semiconductor region and the second electrode. The first and second connection region are electrically connected to the second electrode, reaches the first semiconductor region. The first insulating film is provided between the first connection region and the second semiconductor region and between the first connection region and the first semiconductor region. The second insulating film is provided between the second connection region and the second semiconductor region and between the second connection region and the first semiconductor region. The third connection region is provided between the first connection region and the second connection region, the third connection region is electrically connected to the second electrode, reaches the first semiconductor region or reaches the second semiconductor region.

A manufacturing method includes an implantation of impurities and laser irradiation. In the implantation, impurities are implanted to first and second areas so as to obtain a relationship that a total amount of the first impurities is larger than a total amount of the second impurities in a first depth range and a total amount of the second impurities is larger than a total amount of the first impurities in a second depth range (deeper range). In the irradiation, the first and second areas are irradiated with laser so that an energy density of the laser is larger on the second area than on the first area. A first conductivity type region is formed on the first area so as to be exposed on the surface, and a second conductivity type region is formed on the second area so as to be exposed on the surface.

A vertical III-nitride thin-film power diode can hold off high voltages (kV's) when operated under reverse bias. The III-nitride device layers can be grown on a wider bandgap template layer and growth substrate, which can be removed by laser lift-off of the epitaxial device layers grown thereon.

A thin film device described herein includes a first thin film layer, a second film layer and a heterostructure within the second film layer. The first thin film layer is atop a substrate. The second thin film layer is grown from the first thin film layer through a patterned mask, having openings, under selective area growth (SAG) conditions. The second thin film layer is configured to be released from the first thin film layer by etching a trench. The etched trench may provide access to the patterned mask and the patterned mask may be eliminated with a wet etchant.

A semiconductor device for restraining snapback is provided. The semiconductor device includes IGBT and diode regions. In a view of n-type impurity concentration distribution along a direction from a front surface to a rear surface, a local minimum value of an n-type impurity concentration is located at a border between cathode and buffer regions. A local maximum value of n-type impurity concentration is located in the buffer region. At least one of the butler and cathode regions includes a crystal defect region having crystal detects in a higher concentration than a region therearound. A peak of a crystal defect concentration in a view of crystal defect concentration distribution along the direction from the front surface to the rear surface is located in a region on the rear surface side with respect to a specific position having the n-type impurity concentration which is a half of the local maximum value.