A semiconductor device includes an insulating layer having a first surface and a second surface, a first semiconductor layer and a first thermally conductive portion provided in isolation from each other on the first surface side of the insulating layer, and a first element isolation layer defining the first semiconductor layer and covering the first thermally conductive portion. The first thermally conductive portion has a third surface facing the first semiconductor layer in a first direction parallel to the first surface and a fourth surface facing a second direction that is orthogonal to the first direction and being directed away from the first surface. In the semiconductor device, the thickness of a first part of the first element isolation layer located between the first semiconductor layer and the third surface is less than the thickness of the insulating layer between the first surface and the second surface.

A semiconductor device includes a first semiconductor layer of a first conductivity type that is positioned on a substrate, an insulator positioned in a recess provided in the first semiconductor layer, a second semiconductor layer of the first conductivity type positioned in the recess and at least directly below the insulator, an insulating layer positioned above the first semiconductor layer and the insulator, and a gate positioned on the insulating layer. The first semiconductor layer includes a source region and a drain region of the first conductivity type, a first impurity region positioned around the source region, and a second impurity region that is in contact with a bottom surface of the second semiconductor layer and that is of the first conductivity type. A diffusion coefficient for impurities in the second semiconductor layer is higher than a diffusion coefficient for impurities in the first semiconductor layer.

A semiconductor structure is disclosed that includes: a source feature and a drain feature disposed in a substrate; a gate structure disposed above the substrate and between the source feature and the drain feature; and a first ladder shallow trench isolation (STI) feature disposed in the substrate at least partially under the gate structure in a channel region between the source feature and the drain feature, the first ladder STI feature including a plurality of sections of different depths including a first depth section and a second depth section.