Patent classifications
H10F39/1847
DIGITAL CAMERAS WITH DIRECT LUMINANCE AND CHROMINANCE DETECTION
A digital camera system and method for improving low-light performance. The system includes a plurality of digital cameras, each comprising a luminance channel configured to directly detect luminance signals, one or more chrominance channels configured to detect red and blue chrominance signals, and an optical assembly with lenses optimized for light transmission. A processor is configured to combine luminance and chrominance signals from the cameras to generate image data, independently adjust the integration times for each camera based on the image data to form optimized image data, and transmit the optimized image data for use in digital imaging systems, such as those in automobiles. The invention also encompasses a method and a non-transitory computer-readable medium for performing these operations, providing an efficient solution for capturing high-quality images in low-light environments.
CMOS RGB-IR SENSOR WITH QUADRUPLE-WELL STACK STRUCTURE
An active pixel sensor control circuit for a CMOS image sensor includes: a first control circuit including a transfer transistor, a reset transistor, a source follower and a select transistor, wherein the reset transistor and the source follower are coupled to a first power supply signal; and a second type control circuit including a transfer transistor, a reset transistor, a source follower and a select transistor, wherein the source follower is coupled to the first power supply signal and the reset transistor is coupled to a second power supply signal. When a transfer signal is applied to the gates of the transfer transistors and a reset signal is applied to the gates of the reset transistors, a second photodiode and a fourth photodiode are charged to the first power supply level, and a first photodiode and a third photodiode are discharged to the second power supply level.
Imaging device including multiple photoelectric conversion layers, multiple pixel electrodes and plugs connecting substrate and the pixel electrodes
An imaging device includes a semiconductor substrate, a first pixel, and second pixels adjacent to the first pixel. Each of the first pixel and the second pixels includes a first photoelectric conversion layer, a first pixel electrode, a first plug that electrically connects the semiconductor substrate and the first pixel electrode, a second photoelectric conversion layer, a second pixel electrode, and a second plug that electrically connects the semiconductor substrate and the second pixel electrode. When the imaging device is viewed in a normal direction of the semiconductor substrate, a smallest distance of distances between the first plug in the first pixel and the first plugs in the respective second pixels is smaller than a smallest distance of distances between the first plug in the first pixel and the second plugs in the first pixel and the respective second pixels.
Sensor with upconversion layer
In general, the disclosure describes a sensor comprising a photo-sensitive silicon substrate configured to detect ultraviolet (UV), visible, and near-infrared (NIR) light and an upconversion layer comprising a plurality of crystals configured to convert short wave infrared light to UV, visible, or NIR light. An example sensor includes an upconversion layer comprising a plurality of crystals configured to convert electromagnetic radiation comprising a first range of wavelengths greater than 1100 nm to electromagnetic radiation comprising a second range of wavelengths less than or equal to 1100 nm and a photo-sensitive silicon substrate configured to detect the electromagnetic radiation comprising the second range of wavelengths.
METHODS FOR FABRICATING A MULTILEVEL SEMICONDUCTOR DEVICE AND STRUCTURE WITH IMAGE SENSORS AND WAFER BONDING
A method for fabricating an integrated device, the method including: forming a first level including a first mono-crystal layer, where forming the first level includes forming a plurality of single crystal transistors, a plurality of pixel control circuits, and a plurality of recessed channel transistors therein; disposing an overlying oxide on top of the first level; providing a second level including a second mono-crystal layer, where the second mono-crystal layer includes a plurality of image sensors; bonding the second level to the first level via an oxide-to-oxide bond such that the second level overlays the oxide; and including disposing a third level underneath the first level, where the third level includes a plurality of third transistors, and where the plurality of third transistors each include a single crystal channel.
Time-of-flight system and time-of-flight methods
A Time-of-Flight system having a light source which emits first light rays at a first wavelength and second light rays at a second wavelength to an object, the second wavelength being larger than the first wavelength, and a time-of-flight sensor which detects the first light rays at the first wavelength and the second light rays at the second wavelength, and generates first time-of-flight data associated with the detected first light rays and second time-of-flight data associated with the detected second light rays.
Doped semiconductor structure for NIR sensors
The present disclosure relates a method of forming an integrated chip structure. The method includes etching a base substrate to form a recess defined by one or more interior surfaces of the base substrate. A doped epitaxial layer is formed along the one or more interior surfaces of the base substrate, and an epitaxial material is formed on horizontally and vertically extending surfaces of the doped epitaxial layer. A first doped photodiode region is formed within the epitaxial material and a second doped photodiode region is formed within the epitaxial material. The first doped photodiode region has a first doping type and the second doped photodiode region has a second doping type.