A method of forming a semiconductor structure includes forming a first optical waveguide and a second optical waveguide on a sapphire substrate. The first optical waveguide and the second optical waveguide each include a core portion of gallium nitride (GaN), and a cladding layer laterally surrounding the core portion. The cladding layer includes a material having a refractive index less than a refractive index of the sapphire substrate. The method further includes etching a portion of the cladding layer to form a microfluidic channel therein and forming a capping layer on a top surface of the first optical waveguide, the second optical waveguide and the microfluidic channel.

High-voltage solid-state transducer (SST) devices and associated systems and methods are disclosed herein. An SST device in accordance with a particular embodiment of the present technology includes a carrier substrate, a first terminal, a second terminal and a plurality of SST dies connected in series between the first and second terminals. The individual SST dies can include a transducer structure having a p-n junction, a first contact and a second contact. The transducer structure forms a boundary between a first region and a second region with the carrier substrate being in the first region. The first and second terminals can be configured to receive an output voltage and each SST die can have a forward junction voltage less than the output voltage.

A semiconductor wafer comprising a substrate; a first AlGaN layer on the substrate; a second AlGaN layer on the first AlGaN layer; a GaN layer on the second AlGaN layer; and a plurality of crystalline GaN islands between the first and second AlGaN layers.

Embodiments described herein relate to a dual-band photodetector. The dual-band photodetector includes a barrier layer (10) disposed between two infrared absorption layers (8, 12) wherein the barrier layer (10) is lattice matched to at least one of the infrared absorption layers (8, 12). Furthermore, one infrared absorption layer includes dilute nitride to adjust the band gap to a desired cut-off wavelength while maintaining valence-band alignment with the barrier layer. Embodiments also relate to a system and processes for producing the photodetector fabricated from semiconductor materials.

A semiconductor device used for fluorescent-based molecule detection and a method for manufacturing the same are provided. The semiconductor device has a fluid channel layer defining a fluid channel through which a sample stream flows. A target cell coupled with a fluorescent source is contained by the sample stream. The semiconductor device also has an excitation light source for generating excitation light that reaches the target cell coupled with the fluorescent source to generate fluorescent light. The semiconductor device also has a light filter layer for permitting the fluorescent light to pass through and to block the excitation light and a light detection layer for detecting the fluorescent light. The functional components of the device are highly integrated. Leakage of the excitation light and background noise into the light detection component can be minimized to improve the quality of detection.

The structure and method of fabricating a radiation and temperature hard avalanche photodiode with integrated radiation and temperature hard readout circuit, comprising a substrate, an avalanche region, an absorption region, and a plurality of Ohmic contacts are presented. The present disclosure provides for tuning of spectral sensitivity and high device efficiency, resulting in photon counting capability with decreased crosstalk and reduced dark current.

The present application relates generally to light emitting diodes and photodetectors as well as their methods of manufacture and use. In one exemplary embodiment, an integrated device may include a substrate, a light emitting diode formed on the substrate, and a photodetector formed on the substrate. In another embodiment, a device may include a light emitting diode formed on a substrate, and the light emitting diode may act as both a solid state light and as an optical transmitter.

A method for producing an optoelectronic semiconductor component having a plurality of image points and an optoelectronic component are disclosed. In an embodiment the method includes providing a semiconductor layer sequence including an n-conducting semiconductor layer, an active zone, and a p-conducting semiconductor layer; applying a first layer sequence, wherein the first layer sequence is divided into a plurality of regions which are arranged laterally spaced with respect to each other on a top surface of the p-conducting semiconductor layer; c) applying a second insulating layer; partially removing the p-conducting semiconductor layer and the active zone, in such a way that the n-conducting semiconductor layer is exposed at points and the p-conducting semiconductor layer is divided into individual regions which are laterally spaced with respect to each other, wherein each of the regions comprises a part of the p-conducting semiconductor layer and a part of the active zone.

A superlattice and method for forming that superlattice are disclosed. In particular, an engineered layered single crystal structure forming a superlattice is disclosed. The superlattice provides p-type or n-type conductivity, and comprises alternating host layers and impurity layers, wherein: the host layers consist essentially of a semiconductor material; and the impurity layers consist essentially of a corresponding donor or acceptor material.

Disclosed is a stacked structure which may include a buffer layer, a first semiconductor layer, and a second semiconductor layer. The buffer layer and the first semiconductor layer are stacked with each other in a vertical direction. The second semiconductor layer is in contact with a side surface of the first semiconductor layer and may surround at least a part of the first semiconductor layer in a plane perpendicular to the vertical direction. Each of the first semiconductor layer and the second semiconductor layer may include a Group III-V material or a Group III nitride material. Crystallinity of the first semiconductor layer may be higher than crystallinity of the second semiconductor layer. The buffer layer may be exposed from the second semiconductor layer in the vertical direction.