A semiconductor device according to the present disclosure includes: a semiconductor substrate with a first main surface and a second main surface; a drift layer of a first conductivity type formed in the semiconductor substrate; a first impurity diffusion layer of a second conductivity type formed on the drift layer to be closer to the first main surface; and a buffer layer of the first conductivity type formed on the drift layer to be closer to the second main surface and higher in peak impurity concentration than the drift layer. The drift layer has a first trap, a second trap, and a third trap, whose energy level each is lower than energy at a bottom of a conduction band by 0.246 eV, 0.349 eV, and 0.470 eV. The second trap has trap density of equal to or greater than 2.010.sup.11 cm.sup.3.

A semiconductor device according to the present disclosure includes: a semiconductor substrate with a first main surface and a second main surface; a drift layer of a first conductivity type formed in the semiconductor substrate; a first impurity diffusion layer of a second conductivity type formed on the drift layer to be closer to the first main surface; and a buffer layer of the first conductivity type formed on the drift layer to be closer to the second main surface and higher in peak impurity concentration than the drift layer. The drift layer has a first trap, a second trap, and a third trap, whose energy level each is lower than energy at a bottom of a conduction band by 0.246 eV, 0.349 eV, and 0.470 eV. The second trap has trap density of equal to or greater than 2.010.sup.11 cm.sup.3.

A semiconductor device according to one embodiment includes a first electrode, a second electrode, a semiconductor layer between the first electrode and the second electrode, a plurality of first semiconductor regions on a side of the first electrode, a plurality of second semiconductor regions on surface sides of the plurality of first semiconductor regions, and a plurality of PIN diode regions provided on the side of the first electrode in the semiconductor layer, the plurality of PIN diode regions extending in a third direction orthogonal to the first direction and the second direction, the plurality of PIN diode regions electrically connected to at least one of the plurality of first semiconductor regions and at least one of the plurality of second semiconductor regions.

A semiconductor device according to one embodiment includes a first electrode, a second electrode, a semiconductor layer between the first electrode and the second electrode, a plurality of first semiconductor regions on a side of the first electrode, a plurality of second semiconductor regions on surface sides of the plurality of first semiconductor regions, and a plurality of PIN diode regions provided on the side of the first electrode in the semiconductor layer, the plurality of PIN diode regions extending in a third direction orthogonal to the first direction and the second direction, the plurality of PIN diode regions electrically connected to at least one of the plurality of first semiconductor regions and at least one of the plurality of second semiconductor regions.

Overvoltage protection circuits are provided. In some embodiments, an overvoltage protection circuit includes a first diode made of a first semiconductor material having a bandgap width greater than that of silicon. A second diode is included and is electrically cross-coupled with the first diode. The second diode is made of a second semiconductor material different from the first semiconductor material.

Overvoltage protection circuits are provided. In some embodiments, an overvoltage protection circuit includes a first diode made of a first semiconductor material having a bandgap width greater than that of silicon. A second diode is included and is electrically cross-coupled with the first diode. The second diode is made of a second semiconductor material different from the first semiconductor material.

A semiconductor structure includes a semiconductor substrate, a semiconductor device and a heating structure. The semiconductor substrate includes a device region and a heating region surrounding the device region. The semiconductor device is located on the device region. The heating structure is located on the heating region and includes an intrinsic semiconductor area, at least one heating element and at least one heating pad. The intrinsic semiconductor area is surrounding the semiconductor device. The at least one heating element is located at a periphery of the intrinsic semiconductor area. The at least one heating pad is joined with the at least one heating element, wherein the at least one heating pad includes a plurality of contact structures, and a voltage is supplied from the plurality of contact structures to control a temperature of the at least one heating element.

A semiconductor device of embodiments includes: a semiconductor layer including a first trench, a second trench, a first semiconductor region of a first conductive type, a second semiconductor region of a second conductive type provided between a first face and the first semiconductor region, between the first trench and the second trench, and in contact with the second trench, a third semiconductor region of a first conductive type provided between the first trench and the second semiconductor region, a fourth semiconductor region of a second conductive type provided between the third semiconductor region and the first face, and a fifth semiconductor region of a second conductive type provided between the second semiconductor region and the first face, spaced from the fourth semiconductor region, in contact with the second trench; a first electrode on a first face side; and a second electrode on a second face side.

A semiconductor device of embodiments includes: a semiconductor layer including a first trench, a second trench, a first semiconductor region of a first conductive type, a second semiconductor region of a second conductive type provided between a first face and the first semiconductor region, between the first trench and the second trench, and in contact with the second trench, a third semiconductor region of a first conductive type provided between the first trench and the second semiconductor region, a fourth semiconductor region of a second conductive type provided between the third semiconductor region and the first face, and a fifth semiconductor region of a second conductive type provided between the second semiconductor region and the first face, spaced from the fourth semiconductor region, in contact with the second trench; a first electrode on a first face side; and a second electrode on a second face side.

A semiconductor device includes a semiconductor part, first and second electrodes. The semiconductor part includes first to third layers. The first electrode is provided on a back surface of the semiconductor part. The second electrode is provided on a front surface of the semiconductor part. The first layer of a first conductivity type extends between the first and second electrodes. The second layer of a second conductivity type is provided between the first layer and the second electrode. The third layer of the second conductivity type is provided between the second layer and the second electrode. The second electrode includes a buried contact portion and a surface contact portion. The buried contact portion extends into the second layer from the front surface of the semiconductor part and contacts the second layer. The surface contact portion contacts the third layer at the front surface of the semiconductor part.