In a dynamic computing environment, it is a nontrivial task to verify code running in the environment because most approaches to software similarity require extensive and time-consuming analysis of a binary, or the approaches fail to recognize executables that are similar but nonidentical. A biosequence-based method for quantifying similarity of executable binaries is used to identify allowed codes in a real-world multi-user environment.

A profile guided optimization compiler utilizes sample profile data including a control flow representation of a program having block counts associated with each basic block of the program, and edge counts associated with each control flow edge estimated from the block counts. The sample profile data utilizes correlation data to map the address of a sampled instruction from a fully optimized binary directly into a corresponding basic block of source code control flow of the program using a relative virtual address (RVA) that is associated with each source code basic block and the sampled instruction. The correlation data is able to differentiate multiple blocks on the same source code line and handle inlining and optimizations with greater precision and efficiency. The block counts are then used to guide the optimization of the program.

The present application is directed towards systems and methods for automatic retrofitting of customized code objects during transformation of a system from a source installation to a target installation. In many instances, new objects may be created or objects modified on an online or production system while a development system is being upgraded. Simply copying the upgraded development system to the production system when complete would delete these new objects or modifications. Accordingly, the modifications or new objects may need to be retrofitted, or propagated to the development system and upgraded or transformed for compatibility with the new software, prior to placing the system online.

An information processing apparatus includes a memory; and a processor coupled to the memory. The processor is configured to determine, when a first file among multiple files is compiled, whether a first function defined in the first file calls a second function that includes a loop process. The second function is defined in a second file among the files and different from the first file. The processor executes at least one of: duplicating the second function and a third function into the first file, when determining that the first function calls the second function and a call to the third function defined in any of the multiple files is present in the loop process; and duplicating the second function into the first file, when determining that the first function calls the second function and a pointer type dummy parameter of the second function is referred to within the loop process.

Embodiments provide systems and methods for generating application binaries having self-triage repair capabilities. For example, embodiments enable an independent software vendor (ISV) to statically compile application source code into a self-triaging application binary (STAB) having a release-time executable. Should the release-time executable generate runtime errors when executed, the STAB can apply one or more triage approaches to itself to morph into a triaged executable that executes without some or all of the compiler optimizations that resulted in the errors (e.g., and without generating those errors on subsequent execution). Various implementations of the triage approaches can include one or more levels of de-optimization of functions in the STAB, such as by de-optimizing the last function executed prior to the runtime failure, de-optimizing some or all of a stack trace leading up to the last function executed prior to the runtime failure, de-optimizing all functions executed prior to the runtime failure, etc.

A system and method of parallelizing programs employs runtime instructions to identify data accessed by program portions and to assign those program portions to particular processors based on potential overlap between the access data. Data dependence between different program portions may be identified and used to look for pending “predicate” program portions that could create data dependencies and to postpone program portions that may be dependent while permitting parallel execution of other program portions.

A framework is set forth herein that uses a composition mechanism to produce function data that describes a kernel. The composition mechanism may then send the function data to an execution mechanism. The execution mechanism uses the function data to dynamically execute pre-compiled code modules, which are identified by the function data. According to another aspect, the framework provides different mechanisms for implementing the kernel, depending on the native capabilities of the execution mechanism.

A method and/or network system is able to perform an in-service software upgrade (“ISSU”) using virtualization technology while ongoing network service is maintained. After receipt of an upgrade signal such as a command of software upgrade, a new or second virtual machine (“VM”) is created in response to the upgrade signal. After downloading the new version of program to the second VM while maintaining the first version of program running on the first VM, the process for providing network management begins to migrate from the first version of program to the new version of program. The process simultaneously facilitates ISSU for a data-path module such as a line card to convert from the previous version of software to the new version of the software.

A system and method for efficiently processing instructions in hardware parallel execution lanes within a processor. In response to a given divergent point within an identified loop, a compiler arranges instructions within the identified loop into very large instruction words (VLIW's). At least one VLIW includes instructions intermingled from different basic blocks between the given divergence point and a corresponding convergence point. The compiler generates code wherein when executed assigns at runtime instructions within a given VLIW to multiple parallel execution lanes within a target processor. The target processor includes a single instruction multiple data (SIMD) micro-architecture. The assignment for a given lane is based on branch direction found at runtime for the given lane at the given divergent point. The target processor includes a vector register for storing indications indicating which given instruction within a fetched VLIW for an associated lane to execute.

An update installer generates an update display for a user that allows the user to select updates be applied to a first environment. An export display allows the user to export the selected updates so they can be saved for installation in another environment.