A method of producing a trench gate type MOSFET is provided in which each intersection trench is formed as a two-stage trench structure. A gate trench is backfilled with a mask material and the mask material is then patterned to form a mask used for forming each intersection trench. The intersection trench intersecting the gate trench is provided so as to be deeper than the gate trench. A Schottky electrode is provided in the bottom of each intersection trench 10p. In this manner, there is provided a trench gate type semiconductor device and a method of producing the same, in which: the cell pitch can be reduced even when a wide band gap semiconductor is used as a main semiconductor substrate; good ohmic contacts can be obtained; and an excessive electric field is prevented from being applied to an insulating film in the bottom of each trench.

A semiconductor device includes a semiconductor layer having a first surface and a second surface, a unit cell including a diode region of a first conductivity type formed in a surface layer portion of the first surface of the semiconductor layer, a well region of a second conductivity type formed in the surface layer portion of the first surface of the semiconductor layer along a peripheral edge of the diode region, and a first conductivity type region formed in a surface layer portion of the well region, a gate electrode layer facing the well region and the first conductivity type region through a gate insulating layer and a first surface electrode covering the diode region and the first conductivity type region on the first surface of the semiconductor layer, and forming a Schottky junction with the diode region and an ohmic junction with the first conductivity type region.

An SiC semiconductor device has a p type region including a low concentration region and a high concentration region filled in a trench formed in a cell region. A p type column is provided by the low concentration region, and a p.sup.+ type deep layer is provided by the high concentration region. Thus, since a SJ structure can be made by the p type column and the n type column provided by the n type drift layer, an on-state resistance can be reduced. As a drain potential can be blocked by the p.sup.+ type deep layer, at turnoff, an electric field applied to the gate insulation film can be alleviated and thus breakage of the gate insulation film can be restricted. Therefore, the SiC semiconductor device can realize the reduction of the on-state resistance and the restriction of breakage of the gate insulation film.

A semiconductor device includes field electrode structures extending in a direction vertical to a first surface in a semiconductor body. Cell mesas are formed from portions of the semiconductor body between the field electrode structures and include body zones that form first pn junctions with a drift zone. Gate structures between the field electrode structures control a current flow through the body zones. Auxiliary diode structures with a forward voltage lower than the first pn junctions are electrically connected in parallel with the first pn junctions, wherein semiconducting portions of the auxiliary diode structures are formed in the cell mesas.

In a non-insulated DC-DC converter having a circuit in which a power MOSFET high-side switch and a power MOSFET low-side switch are connected in series, the power MOSFET low-side switch and a Schottky barrier diode to be connected in parallel with the power MOSFET low-side switch are formed within one semiconductor chip. The formation region SDR of the Schottky barrier diode is disposed in the center in the shorter direction of the semiconductor chip, and on both sides thereof, the formation regions of the power MOSFET low-side switch are disposed. From the gate finger in the vicinity of both long sides on the main surface of the semiconductor chip toward the formation region SDR of the Schottky barrier diode, a plurality of gate fingers are disposed so as to interpose the formation region SDR between them.

A power semiconductor device includes a semiconductor structure having a drift region of a first conductivity type. Gate trenches respectively comprising sidewalls and a bottom surface therebetween extend in a first direction in the semiconductor structure, and support shielding structures of a second conductivity type extend in the first direction in the semiconductor structure spaced apart from the sidewalls of the gate trenches. At least two of the support shielding structures are between immediately adjacent pairs of the gate trenches, or at least two of the gate trenches are between immediately adjacent pairs of the support shielding structures. For example, the support shielding structures may include first and second support shielding structures that are free of the gate trenches therebetween, or the gate trenches may include first and second gate trenches that are free of the support shielding structures therebetween. Related devices and fabrication methods are also discussed.

A semiconductor device of embodiments includes: an element region including a transistor, a first diode, and a first contact portion; a termination region surrounding the element region and including a second contact portion; and an intermediate region provided between the element region and the termination region and not including the transistor, the first diode, the first contact portion, and the second contact portion. The element region includes a first electrode, a second electrode, a gate electrode, a silicon carbide layer, and a gate insulating layer. The termination region includes a first wiring layer electrically connected to the first electrode, the second electrode, and the silicon carbide layer. The intermediate region includes the silicon carbide layer. The width of the intermediate region in a direction from the element region to the termination region is equal to or more than twice the thickness of the silicon carbide layer.

We herein describe a silicon-carbide (SiC) based power semiconductor device comprising: a drain region of a first conductivity type; a drift region of the first conductivity type disposed on the drain region, the drift region having a lower doping concentration compared to the doping concentration of the drain region; a body region of a second conductivity type, opposite to the first conductivity type, disposed over the drift region; a contact region of the first conductivity type, disposed within the body region; a source Ohmic contact being disposed on the source region; and one or more trench gate regions being in contact with the source region, the body region and the drift region. Each of the one or more trench gate regions are configured to form a channel region in the body region between the source region and the drift region. At least one trench gate region comprises: two vertical sidewalls and a bottom surface between the two vertical sidewalls; and an insulation layer along the vertical side walls and the bottom surface. The insulation layer comprises different thicknesses such that the insulation layer is thinner at a portion of one of the vertical sidewalls including the channel region than at the other vertical side wall and the trench bottom.

A semiconductor component includes: gate structures extending into a silicon carbide body from a first surface and having a width along a first horizontal direction parallel to the first surface that is less than a vertical extent of the gate structures perpendicular to the first surface; contact structures extending into the silicon carbide body from the first surface, the gate and contact structures alternating along the first horizontal direction; shielding regions which, in the silicon carbide body, adjoin a bottom of the contact structures and are spaced apart from the gate structures along the first horizontal direction; and source regions between the first surface and body regions. The body regions form pn junctions with the source regions and include main sections adjoining the gate structures and contact sections adjoining the contact structures. A vertical extent of the contact structures is greater than the vertical extent of the gate structures.

The present disclosure relates to: a MOSFET device which is applicable to a semiconductor device and, particularly, is manufactured using silicon carbide; and a manufacturing method therefor. The present disclosure provides a metal-oxide-semiconductor field effect transistor device which may comprise: a drain electrode; a substrate disposed on the drain electrode; an N-type drift layer disposed on the substrate; a plurality of P-type well layer regions disposed on the drift layer and spaced apart from each other to define a channel; an N+ region disposed on the well layer regions and adjacent to the channel; a P+ region disposed at the other side of the channel; a gate oxide layer disposed on the drift layer; a gate layer disposed on the gate oxide layer; and a source electrode disposed on the gate layer.