A semiconductor device includes an n.sup.+ type silicon carbide substrate, and in the substrate an active region where primary current flows and an edge termination area surrounding the active region. The semiconductor device has a first p-type region and a second p-type region in the edge termination area, and the first p-type region includes therein a plurality of third p-type regions, and the second p-type region includes therein a plurality of fourth p-type regions. The widths between the respective plurality of third p-type regions and the widths between the respective plurality of fourth p-type regions become greater further away from the active region.

A semiconductor module, an upper and lower arm kit, and a three-level inverter can be provided at low cost and with broad current ratings and voltage ratings using existing packages, without developing new packages. A first semiconductor module (100) on an upper arm side and a second semiconductor module (200) on a lower arm side are made using an existing package, and the semiconductor modules (100) and (200) are used to configure an upper and lower arm kit (300). Further, the upper and lower arm kit (300) is used to configure a three-level inverter (500). These devices can be formed using existing packages (56), and semiconductor modules (100), (200), the upper and lower arm kit (300), and the three-level inverter (500) can be therefore provided at low cost and with broad current ratings and voltage ratings.

A semiconductor device includes a first semiconductor region having first charge carriers of a first conductivity type and a second semiconductor region having second charge carriers. The first semiconductor region includes a transition region in contact with the second semiconductor region, the transition region having a first concentration of the first charge carriers, a contact region having a second concentration of the first charge carriers, wherein the second concentration is higher than the first concentration, and a damage region between the contact region and the transition region. The damage region is configured for reducing lifetime and/or mobility of the first charge carriers of the damage region as compared to the lifetime and/or the mobility of the first charge carriers of the contact region and the transition region.

A reverse blocking semiconductor device is manufactured by introducing impurities of a first conductivity type into a semiconductor substrate of the first conductivity type through a process surface to obtain a process layer extending into the semiconductor substrate up to a first depth, and introducing impurities of a second, complementary conductivity type into the semiconductor substrate through openings of an impurity mask provided on the process surface to obtain emitter zones of the second conductivity type extending up to a second depth deeper than the first depth and channels of the first conductivity type between the emitter zones. Exposed portions of the process layer are removed above the emitter zones.

According to one embodiment, a semiconductor device includes a semiconductor substrate in which a recess is provided on a back surface thereof, and a shape of the recess is reflected on a surface of a metal film which is also provided on the back surface of the semiconductor substrate.

A method for manufacturing a semiconductor device having an SiC-IGBT and an SiC-MOSFET in a single semiconductor chip, including forming a second conductive-type SiC base layer on a substrate, and selectively implanting first and second conductive-type impurities into surfaces of the substrate and base layer to form a collector region, a channel region in a surficial portion of the SiC base layer, and an emitter region in a surficial portion of the channel region, the emitter region serving also as a source region of the SiC-MOSFET.

Embodiments of the invention provide IGBT circuit modules with increased efficiencies. These efficiencies can be realized in a number of ways. In some embodiments, the gate resistance and/or voltage can be minimized. In some embodiments, the IGBT circuit module can be switched using an isolated receiver such as a fiber optic receiver. In some embodiments, a single driver can drive a single IGBT. And in some embodiments, a current bypass circuit can be included. Various other embodiments of the invention are disclosed.

A semiconductor device includes a first IGBT cell having a second-type doped drift zone and a desaturation semiconductor structure for desaturating a charge carrier concentration in the first IGBT cell. The desaturation semiconductor structure includes a first-type doped region forming a pn-junction with the drift zone and two trenches arranged in the first-type doped region and arranged beside the first IGBT cell in a lateral direction. The two trenches confine a mesa region including a first-type doped desaturation channel region and a first-type doped body region at least in the lateral direction. The desaturation channel region and the body region adjoin each other, and the desaturation channel region is a depletable region.

In order to restrict cracking or the like in a connection member such as solder, provided is a semiconductor device including a first component; a second component that is arranged on a front surface of the first component; and a connection portion that is provided between the first component and the second component and connects the second component to the first component. A first groove and a second groove having different shapes are formed in the front surface of the first component at positions opposite a first corner and a second corner of the second component, and the connection portion is also formed within the first groove and the second groove.

An object of the present disclosure is to suppress corrosion of metal used in a termination structure in a semiconductor device. A semiconductor substrate includes a plurality of first termination semiconductor layers of a first conductivity type provided in a first termination region, and a second termination semiconductor layer of a second conductivity type provided in a second termination region. A semiconductor device includes a first insulating layer provided in the first termination region, a plurality of first termination electrode layers electrically connected to the plurality of first termination semiconductor layers, a second termination electrode layer electrically connected to the second termination semiconductor layer, and a second insulating layer contacting with an outermost first termination semiconductor layers and the second termination semiconductor layer.