Provided is a solar cell comprising a photoelectric conversion unit on which textures are formed, and an electrode that includes a plurality of conductive particles. The average size of the textures is adjusted so that the diameter of an inscribed circle in a space surrounded by the ridgelines of a plurality of textures that are adjacent to each other in the textures and a virtual line that connects the vertices of the adjacent textures is smaller than the average particle size of the conductive particles.

An optical touch detection circuit and an optical touch display panel are provided. The optical touch detection circuit includes a photosensitive module and a detection module. The photosensitive module is configured to generate a photoelectric signal. The detection module is connected to the photosensitive module. The detection module is configured to implement an optical touch function based on the photoelectric signal. The provided optical touch detection circuit and optical touch display panel can improve a signal-to-noise ratio of the optical touch detection circuit. This is beneficial for accurately determining a position of an optical touch.

A low cost IC solution is disclosed to provide Super CMOS microelectronics macros. Hereinafter, the Super CMOS or Schottky CMOS all refer to SCMOS. The SCMOS device solutions with a niche circuit element, the complementary low threshold Schottky barrier diode pairs (SBD) made by selected metal barrier contacts (Co/Ti) to P- and NSi beds of the CMOS transistors. A DTL like new circuit topology and designed wide contents of broad product libraries, which used the integrated SBD and transistors (BJT, CMOS, and Flash versions) as basic components. The macros include diodes that are selectively attached to the diffusion bed of the transistors, configuring them to form generic logic gates, memory cores, and analog functional blocks from simple to the complicated, from discrete components to all grades of VLSI chips. Solar photon voltaic electricity conversion and bio-lab-on-a-chip are two newly extended fields of the SCMOS IC applications.

The present disclosure relates to a heterojunction solar cell, a manufacturing method thereof and a photovoltaic module. The heterojunction solar cell includes a substrate of a first conductivity type, a tunnel layer located on a light-receiving surface of the substrate, and a doped polysilicon layer located on a top surface of the tunnel layer. The doped polysilicon layer has the first conductivity type.

A field shaping multi-well avalanche detector and method for fabrication thereof are disclosed. The field shaping multi-well avalanche detector provides stable avalanche multiplication gain in direct conversion amorphous selenium radiation detectors. The detector provides stable avalanche multiplication gain by eliminating field hot-spots using high-density avalanche wells with insulated wells and field-shaping within each well.

A solar cell includes a substrate; a first passivation layer on a first surface of the substrate; a first field region on the first surface of the substrate; an anti-reflection layer on the first passivation layer; a second passivation layer on a second surface of the substrate; an emitter region on the second passivation layer, the emitter region forming a p-n junction and a hetero-junction junction with the substrate; a second field region on the second passivation layer, the second field region forming a hetero-junction with the substrate; a first electrode contacted to the emitter region; a second electrode contacted to the second field region; a spacing between the emitter region and the second field region; and a third passivation layer on the second surface of the substrate at the spacing.

A modified tunnel oxide layer and a preparation method, a TOPCon structure and a preparation method, and a solar cell are provided. The modified tunnel oxide layer is SiO.sub.x subjected to plasma surface treatment, and a Si.sup.4+ content in the SiO.sub.x is greater than or equal to above 18%. The density of the interface state subjected to plasma surface treatment decreases, and compared with the silicon oxide layer prepared in the prior arts, boron has a low diffusion rate in the modified silicon oxide layer and hence the damaging effect of the boron on the tunnel oxide layer is reduced effectively, thereby improving the integrity of the silicon oxide layer and maintaining chemical passivation effect. The modified tunnel oxide layer significantly increases the performance indexes of the TOPCon structure.

Provided are a back-contact battery and a manufacturing method thereof, and a photovoltaic module, which includes a silicon substrate with a front surface and a back surface; a first semiconductor layer with a second semiconductor opening region arranged back surface; and a second semiconductor layer. The back-contact battery further includes multiple insulating layers arranged at intervals along an X-axis direction of the back surface, wherein the insulating layers are arranged on the outer surface of the second semiconductor layer. In the X-axis direction, the insulating layer spans a side-surface edge of the second semiconductor opening region with both ends extending, respectively; the insulating layer has a span length W12 on the second semiconductor opening region, and the insulating layer has a span length W11 on the first semiconductor layer, satisfying a condition: W12:W11=0.1-10:1.

A heterojunction solar cell includes a cell substrate and a conductive layer. The conductive layer includes a first transparent conductive film, a silver electrode, and a second transparent conductive film. The first transparent conductive film is disposed on a surface of the cell substrate, the silver electrode is disposed on a partial region of the first transparent conductive film, and the second transparent conductive film covers the silver electrode and the first transparent conductive film.

In one aspect, a solar cell includes: a monocrystalline silicon substrate; an intrinsic amorphous silicon layer disposed on the monocrystalline silicon substrate; a doped amorphous silicon layer disposed on the intrinsic amorphous silicon layer; a transparent conductive film layer disposed on the doped amorphous silicon layer; and an electrode disposed on the transparent conductive film layer and in direct contact with the doped amorphous silicon layer.