A short-wave infra-red, SWIR, radiation detection device comprises a matrix of cells, each cell comprising a stack of layers including: a first layer of silicon with a first impurity level and a first degree of crystallinity; and a second layer of silicon interfacing the first layer of silicon and having a second impurity level and second degree of crystallinity, the first impurity level differing from the second impurity level and the first degree of crystallinity differing from the second degree of crystallinity, the interface being responsive to incident SWIR radiation to generate carriers within the stack.

An optical touch detection circuit and an optical touch display panel are provided. The optical touch detection circuit includes a photosensitive module and a detection module. The photosensitive module is configured to generate a photoelectric signal. The detection module is connected to the photosensitive module. The detection module is configured to implement an optical touch function based on the photoelectric signal. The provided optical touch detection circuit and optical touch display panel can improve a signal-to-noise ratio of the optical touch detection circuit. This is beneficial for accurately determining a position of an optical touch.

A semiconductor device and a solar cell each having a bonding structure improving reliability of the semiconductor device or the solar cell and a method of manufacturing the same are provided. A semiconductor device or a solar cell includes: a first semiconductor element SB1 including a silicon layer and having a first bonding surface; a second semiconductor element SB2 having a second bonding surface facing the first bonding surface; and a plurality of electrically-conductive nanoparticles 23 positioned between the first bonding surface and the second bonding surface and electrically connecting the first semiconductor element SB1 and the second semiconductor element SB2 to each other, and the plurality of electrically-conductive nanoparticles 23 intrude into the silicon layer. In addition, a method of manufacturing a semiconductor device or a solar cell includes: a step of preparing a first semiconductor element SB1 and a second semiconductor element SB2; a step of arranging a plurality of electrically-conductive nanoparticles 23 on a first bonding surface of the first semiconductor element SB1; a step of intruding the plurality of electrically-conductive nanoparticles 23 into the silicon layer; and then, a step of facing and pressing the second bonding surface to and against the first bonding surface through the plurality of electrically-conductive nanoparticles 23 therebetween.

A solar cell, comprising a silicon cell main body (110), a first transparent conductive oxide layer (120), a second transparent conductive oxide layer (130), an insulating passivation layer (160), and a second electrode (150), wherein the insulating passivation layer (160) covers edges of the back face of the silicon cell main body (110), and at the edges of the back face of the silicon cell main body (110), the second transparent conductive oxide layer (130) and the first transparent conductive oxide layer (120) are arranged spaced apart from each other by means of the insulating passivation layer (160) arranged therebetween.

A method for treating a photovoltaic module, the method including in succession a first procedure of exposing at least one photovoltaic cell of the photovoltaic module to electromagnetic radiation, during which the temperature of the photovoltaic cell increases until reaching a temperature, referred to as performance enhancement temperature, that is greater than or equal to 100 C.; a second procedure of exposing the photovoltaic cell to electromagnetic radiation, during which the temperature of the photovoltaic cell is maintained between T.sub.s5 C. and T.sub.s+5 C., where T.sub.s is the performance enhancement temperature, the second exposure procedure having a duration greater than or equal to 5 s; and a procedure of cooling the photovoltaic cell until a temperature of less than 100 C. is reached.

The present application provides a silicon-based heterojunction solar cell and a manufacturing method thereof. The silicon-based heterojunction solar cell includes: a silicon substrate, as well as a first passivation layer, an N-type doped layer, a first transparent conductive oxide layer and a first electrode. The first passivation layer, the N-type doped layer, the first transparent conductive oxide layer and the first electrode are sequentially stacked on the front side of the silicon substrate along a first direction. The first passivation layer includes a first sub-passivation layer, a carbon-doped amorphous silicon layer and a second sub-passivation layer which are sequentially stacked along the first direction.

A low cost IC solution is disclosed to provide Super CMOS microelectronics macros. Hereinafter, the Super CMOS or Schottky CMOS all refer to SCMOS. The SCMOS device solutions with a niche circuit element, the complementary low threshold Schottky barrier diode pairs (SBD) made by selected metal barrier contacts (Co/Ti) to P and NSi beds of the CMOS transistors. A DTL like new circuit topology and designed wide contents of broad product libraries, which used the integrated SBD and transistors (BJT, CMOS, and Flash versions) as basic components. The macros include diodes that are selectively attached to the diffusion bed of the transistors, configuring them to form generic logic gates, memory cores, and analog functional blocks from simple to the complicated, from discrete components to all grades of VLSI chips. Solar photon voltaic electricity conversion and bio-lab-on-a-chip are two newly extended fields of the SCMOS IC applications.

A low cost IC solution is disclosed to provide Super CMOS microelectronics macros. Hereinafter, the Super CMOS or Schottky CMOS all refer to SCMOS. The SCMOS device solutions with a niche circuit element, the complementary low threshold Schottky barrier diode pairs (SBD) made by selected metal barrier contacts (Co/Ti) to P and NSi beds of the CMOS transistors. A DTL like new circuit topology and designed wide contents of broad product libraries, which used the integrated SBD and transistors (BJT, CMOS, and Flash versions) as basic components. The macros include diodes that are selectively attached to the diffusion bed of the transistors, configuring them to form generic logic gates, memory cores, and analog functional blocks from simple to the complicated, from discrete components to all grades of VLSI chips. Solar photon voltaic electricity conversion and bio-lab-on-a-chip are two newly extended fields of the SCMOS IC applications.

The present application provides a silicon-based heterojunction solar cell and a manufacturing method thereof. The silicon-based heterojunction solar cell includes: a silicon substrate, as well as a first passivation layer, an N-type doped layer, a first transparent conductive oxide layer and a first electrode. The first passivation layer, the N-type doped layer, the first transparent conductive oxide layer and the first electrode are sequentially stacked on the front side of the silicon substrate along a first direction. The first passivation layer includes a first sub-passivation layer, a carbon-doped amorphous silicon layer and a second sub-passivation layer which are sequentially stacked along the first direction.

A narrowband light absorption device based on a phase change material includes: a narrowband light absorption cavity structure, including a metal layer, a dielectric layer, and a phase change layer; and a lithium tantalate single-crystal wafer structure, disposed below the narrowband light absorption cavity structure. When light irradiates the narrowband light absorption cavity structure, the narrowband light absorption cavity structure is configured to absorb light of a corresponding wavelength to produce a pyroelectric effect, and the lithium tantalate single-crystal wafer structure is configured to generate current so as to obtain light intensity information of the light and change a state of the phase change layer to control an on-off state of the switch. The present disclosure achieves dynamic switching control, and features a very narrow full width at half maximum (FWHM), insensitivity to incident light angle variations, a simple structure, easy integration, and a high switching ratio.