A plurality of mesas each includes a channel part positioned between recess and a gate electrode in a first direction, and a contact part located on the channel part, the contact part having a higher first-conductivity-type impurity concentration than the channel part. The channel part includes a first side surface facing the gate electrode in the first direction, and a second side surface positioned at a side opposite to the first side surface in the first direction. The insulating film is located at the second side surface. A second electrode contacts the contact part and the insulating film in the recess.

Described are methods of selectively depositing a cobalt or ruthenium seed layer onto a semiconductor substrate, methods of forming a conductive contact on the semiconductor substrate, and semiconductor substrates formed according to the methods.

A semiconductor device includes a first electrode; a first semiconductor layer including a plurality of mesa parts; a second electrode positioned in a recess provided in an upper portion of the mesa part; a gate electrode adjacent to the mesa part; an insulating film located between the gate electrode and the mesa part; and a second semiconductor layer contacting an end portion of the second electrode. The mesa part includes a first side surface facing the gate electrode via the insulating film in the first direction, and a second side surface positioned at a side opposite to the first side surface. The second electrode contacts the second side surface.

A semiconductor structure and a method for forming a semiconductor structure are provided. The semiconductor structure includes an epitaxial structure and a metal silicide layer. The epitaxial structure includes a semiconductor material. The metal silicide layer is disposed on the epitaxial structure. The metal silicide layer includes the semiconductor material, a first metal material and a second metal material. An atomic size of the first metal material is greater than an atomic size of the second metal material, and a concentration of the first metal material in the metal silicide layer varies along a thickness direction.

A semiconductor device includes an SiC chip that has a first principal surface and a second principal surface, an element structure that is formed in the first principal surface, and an electrode that is formed on the second principal surface and is electrically connected to the element structure and an arithmetic mean roughness (Ra) of the second principal surface is not less than 30 nm. An ohmic contact of low resistance can thereby be formed at the second principal surface at the opposite side to the element structure.

A nanowire transistor includes undoped source and drain regions electrically coupled with a channel region. A source stack that is electrically isolated from a gate conductor includes an interfacial layer and a source conductor, and is coaxially wrapped completely around the source region, extending along at least a portion of the source region. A Schottky barrier between the source conductor and the source region is a negative Schottky barrier and a concentration of free charge carriers is induced in the semiconductor source region.

A method for forming a semiconductor structure includes providing an epitaxial structure including a first semiconductor material and a second semiconductor material, depositing a metal-containing structure on the epitaxial structure, and annealing metal-containing structure and the epitaxial structure to form a metal silicide layer. The metal-containing structure includes a first metal layer, a second metal layer and a third metal layer. The first metal layer and the third metal layer include a first metal material. The second metal layer includes a second metal material. The second metal layer is disposed between the first metal layer and the third metal layer. The metal silicide layer includes the first semiconductor material, the second semiconductor material, the first metal material and the second metal material. Each of a concentration of the first metal material and a concentration of the second metal material in the metal silicide layer varies along a thickness direction.

According to one embodiment, a semiconductor device includes first to third electrodes, a semiconductor member, first and second insulating members. The semiconductor member includes a first semiconductor region. The first semiconductor region includes first to fourth partial regions. The first electrode portion is in contact with the fourth partial region. The first insulating member includes first and second insulating regions. The first insulating region is between the third electrode and the fourth partial region in the second direction. The second insulating region is between the first partial region and the third electrode in the first direction. The second insulating member includes a first insulating portion. The first insulating portion is between the second partial region and the first electrode portion in the first direction.

A semiconductor device includes a substrate, a first electrode and a second electrode. The semiconductor device includes a MOSFET that has the first electrode as a drain electrode and the second electrode as a source electrode. The first electrode has a layer region provided on a first main surface and a first region extending from the first main surface into the substrate in a first direction from the first electrode to the second electrode. A lower surface of the first electrode protrudes in a direction opposite to the first direction.

A nanowire transistor includes undoped source and drain regions electrically coupled with a channel region. A source stack that is electrically isolated from a gate conductor includes an interfacial layer and a source conductor, and is coaxially wrapped completely around the source region, extending along at least a portion of the source region. A Schottky barrier between the source conductor and the source region is a negative Schottky barrier and a concentration of free charge carriers is induced in the semiconductor source region.