A method of fabricating an array substrate, forming a gate line in a display region and a first auxiliary pattern in a non-display region forming a gate insulating layer on the gate line and the first auxiliary pattern forming a data line in the display region and a second auxiliary pattern in the non-display region over the gate insulating layer, wherein the data line crosses the gate line to define a pixel region forming a passivation layer on the data line and the second auxiliary pattern, and the passivation layer including first and second contact holes respectively exposing the first and second auxiliary patterns forming a planarization layer and a bridge pattern on the passivation layer forming a pixel electrode on the planarization layer and in the pixel region, and a connection pattern on the bridge pattern, wherein the connection pattern contacts the first and second auxiliary patterns.

Disclosed are an LCD device and a method of manufacturing the same, which reduce a capacitance deviation between pixels without any change in a viewing angle and a high transmittance. The LCD device includes a plurality of gate lines formed in a first direction on a substrate, a plurality of data lines formed in a second direction to intersect the plurality of gate lines, a thin film transistor (TFT) formed in each of a plurality of pixel areas defined by the plurality of gate lines and the plurality of data lines, a pixel electrode formed in a tetragonal shape in each of the plurality of pixel areas, and a common electrode formed on the pixel electrode, and configured to include a plurality of finger patterns. Each of the plurality of pixel areas is formed in a tetragonal shape.

An array substrate includes an oxide semiconductor layer; an etch stopper including a first contact hole exposing each of both sides of the oxide semiconductor layer; source and drain electrodes spaced apart from each other with the oxide semiconductor layer therebetween; a first passivation layer including a contact hole exposing each of both ends of the oxide semiconductor layer and each of ends of the source and drain electrode that oppose the both ends of the oxide semiconductor layer, respectively; and a connection pattern at the second contact hole contacting both the oxide semiconductor layer and each of the source and drain electrodes.

There is provided a display device including a pixel array unit in which a plurality of pixels are arrayed in a matrix shape. A predetermined amount of light emission variation is added to a light emission state of each pixel and a cycle of the light emission state of the pixel array unit in the case of the addition is shorter than the cycle of a light emission state of the pixel array unit before the predetermined amount of light emission variation is added.

A display device and a method of manufacturing the display device improve reliability by preventing contact between a color filter, a light blocking member and a liquid crystal layer. The display device includes: a substrate including pixel areas; a thin film transistor formed on the substrate; a pixel electrode connected to the thin film transistor and formed in the pixel areas; a roof layer formed on the pixel electrode; microcavities interposed between the pixel electrode and the roof layer; an injection hole formed in the roof layer, the injection hole configured to expose at least a portion of the microcavities; a liquid crystal layer filled in at least one of the microcavities; an encapsulation layer formed on the roof layer, the encapsulation layer configured to cover the injection hole and to seal the microcavities; and an organic layer formed on the encapsulation layer.

The present invention discloses a LTPS TFT pixel unit and a manufacture method thereof. The method comprises steps of: providing a substrate and forming a buffer layer on the substrate; forming a semiconductor pattern layer and a first insulative layer on the buffer layer, and the semiconductor pattern layer and the first insulative layer are located in the same layer and heights of the semiconductor pattern layer and the first insulative layer are the same. With the aforesaid arrangement, the present invention can reduce the side effect of the LTPS TFT pixel unit and promote the electrical property thereof.

The present invention is characterized in that by laser beam being slantly incident to the convex lens, an aberration such as astigmatism or the like is occurred, and the shape of the laser beam is made linear on the irradiation surface or in its neighborhood. Since the present invention has a very simple configuration, the optical adjustment is easier, and the device becomes compact in size. Furthermore, since the beam is slantly incident with respect to the irradiated body, the return beam can be prevented.

This invention provides a polycrystalline oxide thin-film transistor (TFT) array substrate and a method of manufacturing the same. As the polycrystalline oxide thin film layer of the polycrystalline oxide TFT array substrate is formed by a two-step process according to the present invention, the ultra-high temperature annealing process required in the prior art is obviated, and the object of producing a polycrystalline oxide TFT array substrate by the existing manufacturing facilities of the amorphous oxide TFT array substrates is achieved without adding any special equipment or special operation, and it is easy to implement; meanwhile, the energy consumption is reduced as the high temperature annealing is no longer needed.

The present disclosure provides an array substrate, including multiple metallic pattern layers which are insulated and spaced from each other. Each metallic pattern layer comprises a metallic piece made of a metallic material. An oxide film is formed on a lateral face of the metallic piece in at least one of the multiple metallic pattern layers and made of an oxide of the metallic material forming the metallic piece. The present disclosure further provides a display device and a method for manufacturing an array substrate.

The present invention provides a Low Temperature Poly-silicon TFT substrate structure and a manufacture method thereof. By providing the buffer layers in the drive TFT area and the display TFT area with different thicknesses, of which the thickness of the buffer layer in the drive TFT area is larger, and the thickness of the buffer layer in the display TFT area is smaller, different temperature grades are formed in the crystallization process of the polysilicon to achieve the control to the grain diameters of the crystals. The polysilicon layer with larger lattice dimension is formed in the drive TFT area in the crystallization process to raise the electron mobility. The fractured crystals of polysilicon layer in the display TFT area can be obtained in the crystallization process for ensuring the uniformity of the grain boundary and raising the uniformity of the current. Accordingly, the electrical property demands for different TFTs can be satisfied to raise the light uniformity of the OLED.