Semiconductor device stacks and devices made there from having Ge-rich device layers. A Ge-rich device layer is disposed above a substrate, with a p-type doped Ge etch suppression layer (e.g., p-type SiGe) disposed there between to suppress etch of the Ge-rich device layer during removal of a sacrificial semiconductor layer richer in Si than the device layer. Rates of dissolution of Ge in wet etchants, such as aqueous hydroxide chemistries, may be dramatically decreased with the introduction of a buried p-type doped semiconductor layer into a semiconductor film stack, improving selectivity of etchant to the Ge-rich device layers.

The present invention provides a field effect transistor device and a method for improving the short-channel effect and the output characteristics using the same. The field effect transistor device comprises an active layer comprising a source region, a drain region, and a channel region located between the source region and the drain region; when the device is turned on, an effective channel and an equivalent source and/or equivalent drain away from the effective channel are formed in the channel region, and the field effect transistor device connects the source region with the drain region through the effective channel, and the equivalent source and/or equivalent drain to form an operating current.

In order to reduce costs as well as to effectively dissipate heat in certain RF circuits, a semiconductor device of the circuit can include one or more active devices such as transistors, diodes, and/or varactors formed of a first semiconductor material system integrated onto (e.g., bonded to) a base substrate formed of a second semiconductor material system that includes other circuit components. The first semiconductor material system can, for example, be the III-V or III-N semiconductor system, and the second semiconductor material system can, for example be silicon.

A semiconductor device includes a semiconductor structure forming a carrier channel, a barrier layer arranged in proximity with the semiconductor structure, and a set of electrodes for providing and controlling carrier charge in the carrier channel. The barrier layer is at least partially doped by impurities having a conductivity type opposite to a conductivity type of the carrier channel. The material of the barrier layer has a bandgap and thermal conductivity larger than a bandgap and thermal conductivity of material in the semiconductor structure.

Provided in one embodiment is a device, comprising: a substrate; and a layer disposed over the substrate, wherein the layer comprises a monolayer of crystals comprising a Group IV element.

Disclosed herein is a new and improved system and method for fabricating diamond films by first seeding a surface of a transparent substrate. A diamond layer that is at least one of nanocrystalline and ultrananocrystalline can be deposited upon the surface of the transparent substrate and both the diamond layer and the transparent substrate modified to incorporate substitutional atoms.

A semiconductor device includes a buffer layer, a barrier layer, a nitride-based semiconductor layer, an isolation layer, and a gate electrode. The barrier layer is disposed on the buffer layer. The nitride-based semiconductor layer is disposed on the barrier layer and has a channel region and a doped region abutting against each other. The isolation layer covers the nitride-based semiconductor layer. The isolation layer and doped channel region can exhibit a type-II energy band alignment (staggered gate stack). The gate electrode is disposed over the isolation layer and the nitride-based semiconductor layer.

A high frequency RF power transistor includes first and second elongated mesas. In one example, the transistor is part of a millimeter wave MMIC power amplifier. From the top-down perspective, the two mesas are disposed in an off-axis and staggered orientation with respect to one another. A branched gate electrode is formed such that a first branch from a gate signal input location to the first mesa is the same length as a second branch from the input location to the second mesa. Likewise, a branched drain electrode is formed such that a first branch from the first mesa to a drain signal output location is the same length as a second branch from the second mesa to the output location. The off-axis and staggered orientation of the mesas spreads heat generation across the integrated circuit and reduces circuit size in the critical dimension perpendicular to signal flow direction.

Techniques are described for forming a sealed cavity within a semiconductor wafer, where a conductor wafer includes a structure, such as a T-gate electrode or passive component, formed over a substrate. The sealed-cavity structure may be embedded into the wafer without interfering with any subsequent processes. That is, once the cavity is closed, any subsequent backend processes may continue as usual.

A process is provided to fabricate a finFET device having a semiconductor layer of a two-dimensional 2D semiconductor material. The semiconductor layer of the 2D semiconductor material is a thin film layer formed over a dielectric fin-shaped structure. The 2D semiconductor layer extends over at least three surfaces of the dielectric fin structure, e.g., the upper surface and two sidewall surfaces. A vertical protrusion metal structure, referred to as metal fin structure, is formed about an edge of the dielectric fin structure and is used as a seed to grow the 2D semiconductor material.