A solid state imaging element including a drive circuit and a pixel unit with pixels arranged in a matrix form. The pixels include a photoelectric conversion element configured to convert light incident thereupon into a charge and to accumulate the charge, a charge holding unit connected to the photoelectric conversion element, and a floating diffusion region. The drive circuit transfers a first portion of the charge accumulated in the photoelectric conversion element to the charge holding unit and concurrently transfers a second portion of the charge accumulated in the photoelectric conversion element to the floating diffusion region. Electronic global shutter is realized by transferring charge from the photoelectric conversion elements of each of the pixels at substantially the same time.

A high sensitivity image sensor comprises an epitaxial layer of silicon that is intrinsic or lightly p doped (such as a doping level less than about 10.sup.13 cm.sup.3). CMOS or CCD circuits are fabricated on the front-side of the epitaxial layer. Epitaxial p and n type layers are grown on the backside of the epitaxial layer. A pure boron layer is deposited on the n-type epitaxial layer. Some boron is driven a few nm into the n-type epitaxial layer from the backside during the boron deposition process. An anti-reflection coating may be applied to the pure boron layer. During operation of the sensor a negative bias voltage of several tens to a few hundred volts is applied to the boron layer to accelerate photo-electrons away from the backside surface and create additional electrons by an avalanche effect. Grounded p-wells protect active circuits as needed from the reversed biased epitaxial layer.

A semiconductor device is provided that includes an array of imaging cells realized from a plurality of layers formed on a substrate, wherein the plurality of layers includes at least one modulation doped quantum well structure spaced from at least one quantum dot structure. Each respective imaging cell includes an imaging region spaced from a corresponding charge storage region. The at least one quantum dot structure of the imaging region generates photocurrent arising from absorption of incident electromagnetic radiation. The at least one modulation doped quantum well structure defines a buried channel for lateral transfer of the photocurrent for charge accumulation in the charge storage region and output therefrom. The at least one modulation doped quantum well structure and the at least one quantum dot structure of each imaging cell can be disposed within a resonant cavity that receives the incident electromagnetic radiation or below a structured metal film having a periodic array of holes.

An image sensing device includes a pixel array including a plurality of unit pixels consecutively arranged and structured to generate an electrical signal in response to incident light by performing photoelectric conversion of the incident light. The unit pixels are isolated from each other by first device isolation structures. Each of the unit pixels includes a photoelectric conversion element structured to generate photocharges by performing photoelectric conversion of the incident light, a floating diffusion region structured to receive the photocharges, a transfer transistor structured to transfer the photocharges generated by the photoelectric conversion element to the floating diffusion region, and a well tap region structured to apply a bias voltage to a well region. The well tap region is disposed at a center portion of a corresponding unit pixel.

A solid-state imaging device according to an embodiment of the present disclosure includes a mode-switching switch section that, in a first mode, electrically couples a first signal path to a photoelectric conversion section and electrically decouples a second signal path from the photoelectric conversion section, and that, in a second mode, electrically couples both of the first signal path and the second signal path to the photoelectric conversion section. At least the photoelectric conversion section is formed in a first substrate, and at least a second amplification transistor is formed in a second substrate, among the first substrate and the second substrate stacked on each other.

An image sensor including first and second pixel groups, each of which includes first to ninth pixels arranged to form a 33 array is disclosed. The image sensor further includes first to ninth transfer transistors disposed in each of the pixel groups to correspond to the first to ninth pixels, respectively, each of the first to ninth transfer transistors including a transfer gate and a floating diffusion region, a selection transistor disposed in at least one of the fourth to sixth pixels in each of the pixel group, and source follower transistors respectively disposed in at least two pixels of the first to third and seventh to ninth pixels in each of the pixel groups. Source follower gates of the source follower transistors may be connected to the floating diffusion region of each of the first to ninth transfer transistors.

An image sensor is provided. The image sensor may include a substrate including first and second surfaces opposite to each other, a device isolation layer extending through the substrate and having a surface level with the second surface of the substrate, an active region comprising first and second pixel regions spaced apart and separated from each other by the device isolation layer, a photoelectric device located in the substrate and configured to convert light into electric charges, a microlens on the first surface, a first select transistor and a first source follower transistor in the first pixel region, a second source follower transistor in the second pixel region, a first node between the first select transistor and the first source follower transistor, on the first pixel region, and a second node on one side of the first select transistor on the first pixel region.

A depth pixel includes a first photodiode, a second photodiode and a common microlens. First and second taps are disposed at both sides of the first photodiode in a first horizontal direction to sample a photo charge stored in the first photodiode. The second photodiode is disposed at a side of the first photodiode in a second horizontal direction perpendicular to the first horizontal direction. Third and fourth taps are disposed at both sides of the second photodiode in the first horizontal direction to sample a photo charge stored in the second photodiode. The common microlens is disposed above or below the semiconductor substrate. The common microlens covers both of the first photodiode and the second photodiode to focus an incident light to the first photodiode and the second photodiode.

A solid-state imaging device includes a layout in which one sharing unit includes an array of photodiodes of 2 pixels by 4n pixels (where, n is a positive integer), respectively, in horizontal and vertical directions.

Channel stop sections formed by multiple times of impurity ion implanting processes. Four-layer impurity regions are formed across the depth of a semiconductor substrate (across the depth of the bulk), so that a P-type impurity region is formed deep in the semiconductor substrate; thus, incorrect movement of electric charges is prevented. Other four-layer impurity regions of another channel stop section are decreased in width step by step across the depth of the substrate, so that the reduction of a charge storage region of a light receiving section due to the dispersion of P-type impurity in the channel stop section is prevented in the depth of the substrate.