Word lines for a three-dimensional memory device can be formed by forming a stack of alternating layers comprising insulating layers and sacrificial material layers and memory stack structures vertically extending therethrough. Backside recesses are formed by removing the sacrificial material layers through a backside via trench. A metal silicide layer and metal portion are formed in the backside recesses to form the word lines including a metal portion, a metal silicide layer, and optionally, a silicon-containing layer.

The reliability of a semiconductor device is improved. A first insulating film and a protective film are formed on a semiconductor substrate. The first insulating film and the protective film of a first region are selectively removed, and an insulating film is formed on the exposed semiconductor substrate. In a state where the first insulating film in a second region, a third region, and a fourth region is covered with the protective film, the semiconductor substrate is heat-treated in an atmosphere containing nitrogen, thereby introducing nitrogen to the interface between the semiconductor substrate and the second insulating film in the first region. In other words, a nitrogen introduction point is formed on the interface between the semiconductor substrate and the second insulating film. In this configuration, the protective film acts as an anti-nitriding film.

A semiconductor memory device includes first and second electrode films, an interlayer insulating film, a semiconductor pillar, and a first insulating film. The first electrode film extends in a first direction. The second electrode film is provided separately from the first electrode film in a second direction and extends in the first direction. The interlayer insulating film is provided between the first and the second electrode films. The first insulating film includes first and second insulating regions. A concentration of nitrogen in the first position of the second insulating region is higher than a concentration of nitrogen in the second position between the first position and the semiconductor pillar. A concentration of nitrogen in the first insulating region is lower than the concentration of the nitrogen in the first position.

A control gate electrode and a memory gate electrode of a memory cell of a non-volatile memory are formed in a memory cell region of a semiconductor substrate, and a dummy gate electrode is formed in a peripheral circuit region. Then, n.sup.+-type semiconductor regions for a source or a drain of the memory cell are formed in the memory cell region and n.sup.+-type semiconductor regions for a source or a drain of MISFET are formed in the peripheral circuit region. Then, a metal silicide layer is formed over the n.sup.+-type semiconductor regions but the metal silicide layer is not formed over the control gate electrode, the memory gate electrode, and the gate electrode. Subsequently, the gate electrode is removed and replaced with the gate electrode for MISFET. Then, after removing the gate electrode and replacing it with a gate electrode for MISFET, a metal silicide layer is formed over the memory gate electrode and the control gate electrode.

The present invention provides a semiconductor device that has a shorter distance between the bit lines and easily achieves higher storage capacity and density. The semiconductor device includes: first bit lines formed on a substrate; an insulating layer that is provided between the first bit lines and in a groove in the substrate, and has a higher upper face than the first bit lines; channel layers that are provided on both side faces of the insulating layer, and are coupled to the respective first bit lines; and charge storage layers that are provided on the opposite side faces of the channel layers from the side faces on which the insulating layers are formed.

The semiconductor device includes a semiconductor layer having a main surface, a first semiconductor region of a first conductivity type formed in a surface layer portion of the main surface of the semiconductor layer, a second semiconductor region of a second conductivity type formed in a surface layer portion of the first semiconductor region and forming a zener diode with the first semiconductor region, a third semiconductor region of the first conductivity type formed in the surface layer portion of the first semiconductor region separated from the second semiconductor region, a fourth semiconductor region of the second conductivity type formed in a region between the second semiconductor region and the third semiconductor region in the surface layer portion of the first semiconductor region and having a second conductivity type impurity concentration less than a second conductivity type impurity concentration of the second semiconductor region, and an insulating layer formed on the main surface of the semiconductor layer and covering the second semiconductor region, the third semiconductor region and the fourth semiconductor region.

The reliability and performances of a semiconductor device having a nonvolatile memory are improved. A selection gate electrode is formed over a semiconductor substrate via a first insulation film. Over the opposite side surfaces of the selection gate electrode, second insulation films of sidewall insulation films are formed. Over the semiconductor substrate, a memory gate electrode is formed via a third insulation film having a charge accumulation part. The selection gate electrode and the memory gate electrode are adjacent to each other via the second insulation film and the third insulation film. The second insulation film is not formed under the memory gate electrode. The total thickness of the second insulation film and the third insulation film interposed between the selection gate electrode and the memory gate electrode is larger than the thickness of the third insulation film interposed between the semiconductor substrate and the memory gate electrode.

A semiconductor device and method of manufacturing the same are provided. In one embodiment, method includes forming a first oxide layer over a substrate, forming a silicon-rich, oxygen-rich, oxynitride layer on the first oxide layer, forming a silicon-rich, nitrogen-rich, and oxygen-lean nitride layer over the oxynitride layer, and forming a second oxide layer on the nitride layer. Generally, the nitride layer includes a majority of charge traps distributed in the oxynitride layer and the nitride layer. Optionally, the method further includes forming a middle oxide layer between the oxynitride layer and the nitride layer. Other embodiments are also described.

A three-dimensional memory device includes an alternating stack of insulating layers and word lines located over a front side surface of a semiconductor substrate, memory stack structures extending through the alternating stack, in which each of the memory stack structures includes a memory film and a vertical semiconductor channel contacting an inner sidewall of the memory film, drain regions contacting a respective vertical semiconductor channel, bit lines electrically connected to the respective drain regions, driver circuitry for the memory stack structures located on a backside of the semiconductor substrate, and electrically conductive paths vertically extending through the semiconductor substrate and electrically connecting nodes of the driver circuitry to respective word lines or bit lines.

An embedded flash memory device includes a gate stack, which includes a bottom dielectric layer extending into a recess in a semiconductor substrate, and a charge storage layer over the bottom dielectric layer. The charge storage layer includes a portion in the recess. The gate stack further includes a top dielectric layer over the charge storage layer, and a metal gate over the top dielectric layer. Source and drain regions are in the semiconductor substrate, and are on opposite sides of the gate stack.