Patent classifications
H10F77/953
SCALABLE VOLTAGE SOURCE
A scalable voltage source having a number N of partial voltage sources implemented as semiconductor diodes connected to one another in series, wherein each of the partial voltage sources has a semiconductor diode with a p-n junction. A tunnel diode is formed between sequential pairs of partial voltage sources, wherein the tunnel diode has multiple semiconductor layers with a larger band gap than the band gap of the p/n absorption layers and the semiconductor layers with the larger band gap are each made of a material with modified stoichiometry and/or a different elemental composition than the p/n absorption layers of the semiconductor diode. The partial voltage sources and the tunnel diodes are monolithically integrated together, and jointly form a first stack with a top and a bottom, and the number N of partial voltage sources is greater than or equal to two.
Microstructure enhanced absorption photosensitive devices
Techniques for enhancing the absorption of photons in semiconductors with the use of microstructures are described. The microstructures, such as pillars and/or holes, effectively increase the effective absorption length resulting in a greater absorption of the photons. Using microstructures for absorption enhancement for silicon photodiodes and silicon avalanche photodiodes can result in bandwidths in excess of 10 Gb/s at photons with wavelengths of 850 nm, and with quantum efficiencies of approximately 90% or more.
MONOLITHIC INTEGRATION TECHNIQUES FOR FABRICATING PHOTODETECTORS WITH TRANSISTORS ON SAME SUBSTRATE
Examples of the various techniques introduced here include, but not limited to, a mesa height adjustment approach during shallow trench isolation formation, a transistor via first approach, and a multiple absorption layer approach. As described further below, the techniques introduced herein include a variety of aspects that can individually and/or collectively resolve or mitigate one or more traditional limitations involved with manufacturing PDs and transistors on the same substrate, such as above discussed reliability, performance, and process temperature issues.
MONOLITHIC INTEGRATION TECHNIQUES FOR FABRICATING PHOTODETECTORS WITH TRANSISTORS ON SAME SUBSTRATE
Examples of the various techniques introduced here include, but not limited to, a mesa height adjustment approach during shallow trench isolation formation, a transistor via first approach, and a multiple absorption layer approach. As described further below, the techniques introduced herein include a variety of aspects that can individually and/or collectively resolve or mitigate one or more traditional limitations involved with manufacturing PDs and transistors on the same substrate, such as above discussed reliability, performance, and process temperature issues.
RADIATION DETECTOR
A radiation detector according to an embodiment of the present invention includes: a transistor in which an oxide semiconductor layer is used in a channel of the transistor; a photoelectric converting layer connected to the transistor; a wavelength converting layer facing the photoelectric converting layer and capable of emitting visible light based on radioactive rays absorbed by the wavelength converting layer; and an oxide layer in contact with the oxide semiconductor layer between the transistor and the photoelectric converting layer, wherein a thickness of the oxide layer is 50 nm or less.
OPTICAL RECEIVER COMPRISING MONOLITHICALLY INTEGRATED PHOTODIODE AND TRANSIMPEDANCE AMPLIFIER
An optical receiver comprises a monolithically integrated photodiode (PD) and transimpedance amplifier (TIA). The TIA comprises InP heterojunction bipolar transistors (HBT) fabricated from a first plurality of layers of an epitaxial layer stack grown on a SI:InP substrate; the PD may be a pin PD fabricated from a second plurality of layers of the epitaxial layer stack, overlying the first plurality of layers. The p-contact of the PIN is directly connected to the input of the TIA to reduce PIN capacitance C.sub.PIN. The TIA capacitance C.sub.TIA may be matched to C.sub.PIN. The PD may be a vertical PIN with a top facet window or a waveguide PD with a lateral facet window. Device parameters comprising a device area, device capacitance C.sub.PIN+C.sub.TIA; and feedback resistance R.sub.F of the TIA are optimized to performance specifications comprising a specified sensitivity and responsivity at an operational wavelength. This design approach enables cost-effective fabrication of integrated PIN-TIA.
Photodetectors and photodetector arrays
A dynamic photodiode detector or detector array having a light absorbing region of doped semiconductor material for absorbing photons. Electrons or holes generated by photon absorption are detected with a construction of oppositely heavily doped anode and cathode regions and a heavily doped ground region of the same doping type as the anode region. Photon detection involves switching the device from reverse bias to forward bias to create a depletion region enclosing the anode region. When a photon is then absorbed the electron or hole thereby generated drifts under the electric field induced by the biasing to the depletion region where it causes the anode-to-ground current to increase. Furthermore, the detector is configured such that anode-to-cathode current starts to flow once a threshold number of electrons or holes reaches the depletion region, where the threshold may be one to provide single photon detection.
LIGHT-RECEIVING DEVICE
A light-receiving device includes graphene including a light-receiving part; major electrodes electrically connected with the graphene, the major electrodes including a source electrode and a drain electrode, the light-receiving part being positioned between the source electrode and the drain electrode; a gate electrode electrically connected with the light-receiving part of the graphene via capacitive coupling; a circuit part electrically connected with the major electrode and the gate electrode; and an ionic substance contacting the light-receiving part of the graphene. The ionic substance is one of an anion having an acid dissociation constant of not less than 3 or a cation having an acid dissociation constant of not more than 11.
Logarithmic current to voltage converters
Apparatus and methods for logarithmic current to voltage conversion are disclosed herein. In certain embodiments, a logarithmic current to voltage converter includes an input terminal that receives an input current, an output terminal that provides a logarithmic output voltage, a first field-effect transistor (FET) having a gate connected to the input terminal, a first bipolar transistor having a collector connected to the input terminal and an emitter connected to the output terminal, and a stacked transistor connected to the output terminal and to the first FET to form a feedback loop. For example, the stacked transistor can correspond to a second bipolar transistor having a collector connected to the output terminal and a base connected to the source of the first FET, or to a second FET having a drain connected to the output terminal and a gate connected to the source of the first FET.
Photoelectric conversion apparatus, imaging system, movable object, and semiconductor substrate
A photoelectric conversion apparatus includes a photodiode, a generation circuit, a first control circuit, and a second control circuit. The photodiode is configured to perform avalanche multiplication. The generation circuit is configured to generate a control signal. The first control circuit is configured to be controlled by the control signal to be in a standby state where the avalanche multiplication by the photodiode is possible and in a recharging state for returning the photodiode having performed the avalanche multiplication to the standby state. The second control circuit is configured to count a number of periods in which the avalanche multiplication has occurred among a plurality of periods of the standby state by using the control signal and a signal corresponding to an output of the photodiode.