H10F77/12485

Silicon heterojunction photovoltaic device with wide band gap emitter

A photovoltaic device including a single junction solar cell provided by an absorption layer of a type IV semiconductor material having a first conductivity, and an emitter layer of a type III-V semiconductor material having a second conductivity, wherein the type III-V semiconductor material has a thickness that is no greater than 50 nm.

High-voltage solid-state transducers and associated systems and methods
09711701 · 2017-07-18 · ·

High-voltage solid-state transducer (SST) devices and associated systems and methods are disclosed herein. An SST device in accordance with a particular embodiment of the present technology includes a carrier substrate, a first terminal, a second terminal and a plurality of SST dies connected in series between the first and second terminals. The individual SST dies can include a transducer structure having a p-n junction, a first contact and a second contact. The transducer structure forms a boundary between a first region and a second region with the carrier substrate being in the first region. The first and second terminals can be configured to receive an output voltage and each SST die can have a forward junction voltage less than the output voltage.

Structures for Increased Current Generation and Collection in Solar Cells with Low Absorptance and/or Low Diffusion Length

The present disclosure generally relates to a solar cell device that a first Bragg reflector disposed below a first solar cell and a second Bragg reflector disposed below the first Bragg reflector, wherein the first solar cell comprises a dilute nitride composition and has a first bandgap, wherein the first Bragg reflector is operable to reflect a first range of radiation wavelengths back into the first solar cell and the second Bragg reflector is operable to reflect a third range of wavelengths back into the first solar cell, and the first Bragg reflector and the second Bragg reflector are operable to cool the solar cell device by reflecting a second range of radiation wavelengths that are outside the photogeneration wavelength range of the first solar cell or that are weakly absorbed by the first solar cell.

Structures for Increased Current Generation and Collection in Solar Cells with Low Absorptance and/or Low Diffusion Length

The present disclosure generally relates to a solar cell device that includes a substrate comprising a front side surface and a backside surface; an epitaxial region overlying the substrate, wherein the epitaxial region comprises a first Bragg reflector disposed below a first solar cell, wherein the first solar cell has a first bandgap, wherein the first Bragg reflector is operable to reflect a first range of radiation wavelengths back into the first solar cell, and is operable to cool the solar cell device by reflecting a second range of radiation wavelengths that are outside the photogeneration wavelength range of the first solar cell or that are weakly absorbed by the first solar cell, and may additionally comprise a second Bragg reflector operable to reflect a third range of radiation wavelengths back into the first solar cell.

Semiconductor material
09705031 · 2017-07-11 · ·

A semiconductor wafer comprising a substrate; a first AlGaN layer on the substrate; a second AlGaN layer on the first AlGaN layer; a GaN layer on the second AlGaN layer; and a plurality of crystalline GaN islands between the first and second AlGaN layers.

Two-color barrier photodetector with dilute-nitride active region

Embodiments described herein relate to a dual-band photodetector. The dual-band photodetector includes a barrier layer (10) disposed between two infrared absorption layers (8, 12) wherein the barrier layer (10) is lattice matched to at least one of the infrared absorption layers (8, 12). Furthermore, one infrared absorption layer includes dilute nitride to adjust the band gap to a desired cut-off wavelength while maintaining valence-band alignment with the barrier layer. Embodiments also relate to a system and processes for producing the photodetector fabricated from semiconductor materials.

Radiation and temperature hard multi-pixel avalanche photodiodes

The structure and method of fabricating a radiation and temperature hard avalanche photodiode with integrated radiation and temperature hard readout circuit, comprising a substrate, an avalanche region, an absorption region, and a plurality of Ohmic contacts are presented. The present disclosure provides for tuning of spectral sensitivity and high device efficiency, resulting in photon counting capability with decreased crosstalk and reduced dark current.

Light emitting diodes and photodetectors

The present application relates generally to light emitting diodes and photodetectors as well as their methods of manufacture and use. In one exemplary embodiment, an integrated device may include a substrate, a light emitting diode formed on the substrate, and a photodetector formed on the substrate. In another embodiment, a device may include a light emitting diode formed on a substrate, and the light emitting diode may act as both a solid state light and as an optical transmitter.

Electronic devices comprising n-type and p-type superlattices
09685587 · 2017-06-20 · ·

A superlattice and method for forming that superlattice are disclosed. In particular, an engineered layered single crystal structure forming a superlattice is disclosed. The superlattice provides p-type or n-type conductivity, and comprises alternating host layers and impurity layers, wherein: the host layers consist essentially of a semiconductor material; and the impurity layers consist essentially of a corresponding donor or acceptor material.

Surface mount solar cell with integrated coverglass

Photovoltaic cells, methods for fabricating surface mount multijunction photovoltaic cells, methods for assembling solar panels, and solar panels comprising photovoltaic cells are disclosed. The surface mount multijunction photovoltaic cells include through-wafer-vias for interconnecting the front surface epitaxial layer to a contact pad on the back surface. The through-wafer-vias are formed using a wet etch process that removes semiconductor materials non-selectively without major differences in etch rates between heteroepitaxial III-V semiconductor layers.