A superconducting device includes a substrate, a metal oxide or metal oxynitride seed layer on the substrate, and a metal nitride superconductive layer disposed directly on the seed layer. The seed layer is an oxide or oxynitride of a first metal, and the superconductive layer is a nitride of a different second metal.

One example includes a memory circuit. The memory circuit includes a memory array in which contiguous rows of the memory array are organized as a write-bypass portion that comprises a first portion of the rows and a main memory portion that includes a remaining portion of the rows. A given data word is stored in each of a row in the write-bypass portion and another row in the main memory portion during a data write operation in response to word-write signals and bit-write signals associated with each of the respective plurality of contiguous columns. The circuit also includes a control logic configured to store data associated with storage locations of the given data word in each of the row in the write-bypass portion and the other row in the main memory portion to facilitate access of the given data word during a data read operation.

A method is provided of forming a superconductor device interconnect structure. The method includes forming a first dielectric layer overlying a substrate, and forming a base electrode in the first dielectric layer with the base electrode having a top surface aligned with the top surface of the first dielectric layer. The method further comprises forming a Josephson junction (JJ) over the base electrode, depositing a second dielectric layer over the JJ, the base electrode and the first dielectric layer, and forming a first contact through the second dielectric layer to the base electrode to electrically couple the first contact to a first end of the JJ, and a second contact through the second dielectric layer to a second end of the JJ.

A tunable quantum qubit circuit comprising: a plurality of interconnected Josephson tunneling junctions sculpted in-situ on-chip, wherein each Josephson tunneling junction comprises a pair of high temperature superconductors separated by an active region having a controlled charge density; a capacitive-coupled control gate operatively coupled to the Josephson tunneling junctions and configured to simultaneously modulate energy levels of the Josephson tunneling junctions; and independent control gates operatively coupled to the Josephson tunneling junctions, wherein the independent control gates are reconfigurable on-the-fly by an operator.

Superconducting integrated circuits require several wiring layers to distribute bias and signals across the circuit, which must cross each other both with and without contacts. All wiring lines and contacts must be fully superconducting, and in the prior art each wiring layer comprises a single metallic thin film. An alternative wiring layer is disclosed that comprises sequential layers of two or more different metals. Such a multi-metallic wiring layer may offer improved resistance to impurity diffusion, better surface passivation, and/or reduction of stress, beyond that which is attainable with a single-metallic wiring layer. The resulting process leads to improved margin and yield in an integrated circuit comprising a plurality of Josephson junctions. Several preferred embodiments are disclosed, for both planarized and non-planarized processes. These preferred and other methods may be applied to digital circuits based on Rapid Single Flux Quantum logic, and to quantum computing using Josephson junction qubits.

A method for increasing the integration level of superconducting electronic circuits, comprising fabricating a series of planarized electrically conductive layers patterned into wiring, separated by planarized insulating layers, with vias communicating between the conductive layers. Contrary to the standard sequence of patterning from the bottom up, the pattern of vias in at least one insulating layer is formed prior to the pattern of wiring in the underlying conductive layer. This enables a reduction in the number of planarization steps, leading to a fabrication process which is faster and more reliable. In a preferred embodiment, the superconductor is niobium and the insulator is silicon dioxide. This method can provide 10 or more wiring layers in a complex integrated circuit, and is compatible with non-planarized circuits placed above the planarized wiring layers.

A capacitively-driven tunable coupler includes a coupling capacitor connecting an open end of a quantum object (i.e., an end of the object that cannot have a DC path to a low-voltage rail, such as a ground node, without breaking the functionality of the object) to an RF SQUID having a Josephson element capable of providing variable inductance and therefore variable coupling to another quantum object.

One example includes a tunable current-mirror qubit. The qubit includes a plurality of flux tunable elements disposed in a circuit loop. A first portion of the flux tunable elements can be configured to receive a first input flux and a remaining portion of the flux tunable elements can be configured to receive a second input flux to control a mode of the tunable current-mirror qubit between a microwave excitation mode to facilitate excitation or quantum state manipulation of the tunable current-mirror qubit via a microwave input signal and a noise-protected mode to facilitate storage of the quantum state of the tunable current-mirror qubit. The qubit also includes at least one capacitor interconnecting nodes between respective pairs of the flux tunable elements to facilitate formation of Cooper-pair excitons in each of the microwave excitation mode and the noise-protected mode.

A quantum system includes a qubit array comprising a plurality of qubits. A bus resonator is coupled between at least one pair of qubits in the qubit array. A switch is coupled between the at least one qubit pair of qubits.

A tunable oscillator including a Josephson junction. In some embodiments, the tunable oscillator includes a first superconducting terminal, a second superconducting terminal, a graphene channel including a portion of a graphene sheet, and a conductive gate. The first superconducting terminal, the second superconducting terminal, and the graphene channel together may form a Josephson junction having an oscillation frequency, and the conductive gate may be configured, upon application of a voltage across the conductive gate and the graphene channel, to modify the oscillation frequency.