A Josephson parametric converter is provided. The Josephson parametric converter includes a multi-Josephson junction ring modulator having arrays of N Josephson junctions arranged in a ring configuration with ring nodes inter-dispersed between the arrays. The multi-Josephson junction ring modulator further has a center node inter-connecting the ring nodes. N is an integer having a value greater than one. The Josephson parametric also includes a first and a second resonator formed from lumped-element capacitors that shunt the multi-Josephson junction ring modulator and respectively enable a first and a second mode of the Josephson parametric converter.

A Josephson parametric converter is provided. The Josephson, parametric convener includes a multi-Josephson junction ring modulator having arrays of N Josephson junctions arranged in a ring configuration with nodes inter-dispersed between the arrays. N is an integer having a value greater than one. The Josephson parametric converter further includes a first and a second resonator formed from lumped-element capacitors that shunt the multi-Josephson junction ring modulator and respectively enable a first and a second mode of the Josephson parametric converter. The Josephson parametric converter also includes a first and a second LC circuit for respectively coupling the first and the second resonator to external feedlines.

An apparatus includes a substrate, a classical computing processor formed on the substrate, a quantum computing processor formed on the substrate, and one or more coupling components between the classical computing processor and the quantum computing processor, the one or more coupling components being formed on the substrate and being configured to allow data exchange between the classical computing processor and the quantum computing processor.

Novel and useful quantum structures having a continuous well with control gates that control a local depletion region to form quantum dots. Local depleted well tunneling is used to control quantum operations to implement quantum computing circuits. Qubits are realized by modulating gate potential to control tunneling through local depleted region between two or more sections of the well. Complex structures with a higher number of qdots per continuous well and a larger number of wells are fabricated. Both planar and 3D FinFET semiconductor processes are used to build well to gate and well to well tunneling quantum structures. Combining a number of elementary quantum structure, a quantum computing machine is realized. An interface device provides an interface between classic circuitry and quantum circuitry by permitting tunneling of a single quantum particle from the classic side to the quantum side of the device. Detection interface devices detect the presence or absence of a particle destructively or nondestructively.

An interdigitated capacitor includes a substrate and a pair of comb-like electrodes both formed on the semiconductor substrate and horizontally arranged thereon, each of the pair of comb-like electrodes including finger electrodes having a curved profile.

An acoustic matching layer is formed on individual ultrasonic transducer elements on a base. Electric conductors are arranged between adjacent ultrasonic transducer elements, the electric conductors being connected to electrodes of the ultrasonic transducer elements. Protective films overlap the electric conductors. The protective films have smaller moisture permeability than the acoustic matching layer. Wall portions are arranged on the protective films, the wall portions separating portions of the acoustic matching layer that are respectively located on adjacent ultrasonic transducer elements from each other at least in a part of a height range with respect to a height direction from the base, and having an acoustic impedance that is different from the acoustic impedance of the acoustic matching layer.

A stacked memory chip includes a chip input-output pad unit, a first semiconductor die and a second semiconductor die. The chip input-output pad unit includes a chip command-address pad unit, a lower chip data pad unit and an upper chip data pad unit that are to be connected to an external device. The first semiconductor die electrically is connected to the chip command-address pad unit and the lower chip data pad unit and electrically disconnected from the upper chip data pad unit. The second semiconductor die electrically is connected to the chip command-address pad unit and the upper chip data pad unit and electrically disconnected from the lower chip data pad unit. The input-output load may be reduced by selectively connecting each of the stacked semiconductor dies to one of the lower chip data pad unit and the upper chip data pad unit.

A circuit manufacturing method according to the present disclosure is a circuit manufacturing method by deposition, comprising performing first deposition for forming a first superconductor layer, oxidizing a surface of the first superconductor layer to form an oxide film, performing second deposition for forming a second superconductor layer, whereby a circuit in which Josephson junctions are aligned is generated. A mask includes two opening parts and an odd number of first-type opening parts. The width of a first-type opening part has such a length that the area of a Josephson junction formed based on the first superconductor layer and the second superconductor layer derived from the first-type opening part becomes larger than the area of a Josephson junction formed based on the first superconductor layer and the second superconductor layer derived from the two opening parts that are adjacent to each other.

Devices and/or computer-implemented methods facilitating static ZZ suppression and Purcell loss reduction using mode-selective coupling in two-junction superconducting qubits are provided. In an embodiment, a device can comprise a superconducting bus resonator. The device can further comprise a first superconducting qubit. The device can further comprise a second superconducting qubit, the first superconducting qubit and the second superconducting qubit respectively comprising: a first superconducting pad; a second superconducting pad; a third superconducting pad; a first Josephson Junction coupled to the first superconducting pad and the second superconducting pad; and a second Josephson Junction coupled to the second superconducting pad and the third superconducting pad. The first superconducting pad and the second superconducting pad of the first superconducting qubit and the second superconducting qubit are coupled to the superconducting bus resonator. The superconducting bus resonator entangles the first superconducting qubit and the second superconducting qubit based on receiving a control signal.

Devices and/or computer-implemented methods to facilitate ZZ cancellation between qubits are provided. According to an embodiment, a device can comprise a coupler device that operates in a first oscillating mode and a second oscillating mode. The device can further comprise a first superconducting qubit coupled to the coupler device based on a first oscillating mode structure corresponding to the first oscillating mode and based on a second oscillating mode structure corresponding to the second oscillating mode. The device can further comprise a second superconducting qubit coupled to the coupler device based on the first oscillating mode structure and the second oscillating mode structure.