Patent classifications
H10H20/8142
Light-emitting diode and driving method therefor, and light source apparatus and electronic device
A light emitting diode including saturable absorber layer is provided. The light emitting diode includes: a substrate; a reflective light-emitting layer disposed on the substrate; a first electrode, a second electrode, and a first insulating layer which are discretely disposed on the reflective light-emitting layer; a saturable absorber layer disposed on the first insulating layer; and a third electrode, a fourth electrode, and a reflective composite layer which are disposed on the saturable absorber layer, respectively, the reflectivity of the reflective light-emitting layer is greater than the reflectivity of the reflective composite layer; wherein the orthographic projections of the saturable absorber layer, the third electrode, the fourth electrode, and the reflective composite layer on the reflective light-emitting layer, respectively, do not overlap with the first electrode and the second electrode.
Display device and manufacturing method thereof
A display device may include: a base layer including a display area and a non-display area; and a plurality of pixels provided on the display area, and each including a plurality of sub-pixels. Each of the sub-pixels may include a pixel circuit layer, and a display element layer including an emission area formed to emit light, and a non-emission area provided around a perimeter of the emission area. The display element layer may include: a partition wall provided on the emission area of each of the sub-pixels; a bank provided on the non-emission area of each sub-pixel, and disposed on a surface equal to a surface on which the partition wall is disposed; a first electrode and a second electrode provided on the partition wall and spaced apart from each other; and at least one light emitting element provided between the first and second electrodes in the emission area of each sub-pixel, and configured to emit the light.
Light emitting device pakage
A light-emitting device package includes a frame including one side on which a first electrode is formed and the other side on which a second electrode is formed, an LED chip including a first conductive connection pad electrically connected to the first electrode and a second conductive connection pad electrically connected to the second electrode, a reflective member disposed on the frame, forming a cavity for accommodating the LED chip therein, and reflecting light emitted from the LED chip, and a wavelength conversion member filled in the cavity to cover the LED chip, wherein the reflective member includes a first side and a second side different from the first side, and a first height of the first side and a second height of the second side are formed to be different from each other.
SYSTEM, METHOD, AND APPARATUS FOR CONVERSION(S) IN PERIODICALLY POLED LAYERED SEMICONDUCTOR(S)
Exemplary systems, methods, and apparatuses are provided for generating at least one periodically poled layered compound. Exemplary systems, methods, and apparatuses according to an exemplary embodiment of the present disclosure can include patterning a plurality of slabs of layered compounds and stacking the plurality of slabs with each slab twisted relative to each adjacent slab.
Method for electrochemically etching a semiconductor structure
A method for etching a semiconductor structure (110) is provided, the semiconductor structure comprising a sub-surface quantum structure (30) of a first III-V semiconductor material, beneath a surface layer (31) of a second III-V semiconductor material having a charge carrier density of less than 510.sup.17 cm.sup.3. The sub-surface quantum structure may comprise, for example, a quantum well, or a quantum wire, or a quantum dot. The method comprises the steps of exposing the surface layer to an electrolyte (130), and applying a potential difference between the first III-V semiconductor material and the electrolyte, to electrochemically etch the sub-surface quantum structure (30) to form a plurality of nanostructures, while the surface layer (31) is not etched. A semiconductor structure, uses thereof, and devices incorporating such semiconductor structures are further provided.
Preparation method for resonant cavity light-emitting diode
A preparation method for a resonant cavity light-emitting diode comprises: forming a first mirror and a first semiconductor layer on a substrate in sequence; forming an active layer on the first semiconductor layer; and forming a second semiconductor layer and a second mirror on the active layer in sequence. The preparation method further comprises: planarizing at least one of a first contact surface between the first semiconductor layer and the first mirror, and a second contact surface between the second semiconductor layer and the second mirror. Since the first contact surface between the first semiconductor layer and the first mirror, and/or the second contact surface between the second semiconductor layer and the second mirror is planarized, the light emission uniformity of the resonant cavity light-emitting diode can be improved.
Light-emitting element
A light-emitting element includes a first reflection layer, a second reflection layer, a multi-layer light-emitting structure, and a light-transmitting semiconductor layer. The first reflection layer has a first reflectance, and the second reflection layer has a second reflectance greater than the first reflectance. The multi-layer light-emitting structure is between the first reflection layer and the second reflection layer. The light-transmitting semiconductor layer is located on the first reflection layer and has an upper light-extracting surface, and the first reflection layer is closer to the upper light-extracting surface than the second reflection layer. An interval between the upper light-extracting surface and the first reflection layer is equal to or smaller than 5 m.
Light emitting diodes with directional emission and displays including the same
A full color display includes multiple pixels and has a white point, a direction of emission and a solid angle of emission around the direction of emission characterized by a half-cone angle . Each pixel includes: a sub-pixel including a red LED having a first geometry emitting red light into a range of emission angles, such that a fraction of the power emitted within the solid angle of emission is at least 1.2*(1cos().sup.2); a sub-pixel including a green LED having a second geometry emitting green light into a range of emission angles, such that a fraction of the power emitted within the solid angle of emission is at least 1.2*(1cos().sup.2); and a sub-pixel including a blue LED emitting blue light into a range of emission angles, such that a fraction of the power emitted within the solid angle of emission is at least 1.2*(1cos().sup.2). The LEDs are configured such that, in any direction within the solid angle of emission, white light emitted by the display has a chromaticity difference Duv from the white point of the display which is less than 0.01.
NANO BESSEL LASER BEAM EMITTER AND METHOD FOR MANUFACTURING THE SAME
A nano Bessel laser beam emitter and a method for manufacturing the same are disclosed. The nano Bessel laser beam emitter includes a first Bragg reflecting layer, a light-emitting layer and a second Bragg reflecting layer, where the first Bragg reflecting layer defines a cylindrical through hole; the light-emitting layer is provided on a surface of the first Bragg reflecting layer and is configured to generate a light beam; and the second Bragg reflecting layer is provided on the light-emitting layer at a side distal to the first Bragg reflecting layer.
Semiconductor structures and manufacturing methods thereof
A semiconductor structure and a manufacturing method thereof are provided. The semiconductor structure may include: a first epitaxial layer disposed on a substrate; a bonding layer disposed on the first epitaxial layer (where the bonding layer is provided with a first through-hole to expose the first epitaxial layer); a silicon substrate disposed on a side of the bonding layer away from the first epitaxial layer (where the first epitaxial layer is bonded to the silicon substrate by the bonding layer, the silicon substrate is provided with a through-silicon-via, and the through-silicon-via communicates with the first through-hole); a silicon device disposed on the silicon substrate; and a second epitaxial layer disposed on the first epitaxial layer exposed by the first through-hole. The present disclosure can improve the quality of the second epitaxial layer, and realize the integration of a silicon device and a III-V semiconductor device.