Patent classifications
H10F19/50
MONOLITHIC INTEGRATION OF III-V CELLS FOR POWERING MEMORY ERASURE DEVICES
A method for making a photovoltaic device is provided that includes the steps of providing a silicon substrate having a complementary metal-oxide semiconductor (CMOS); bonding a first layer of silicon oxide to a second layer of silicon oxide wherein the bonded layers are deposited on the silicon substrate; and forming a III-V photovoltaic cell on a side of the bonded silicon oxide layers opposite the silicon substrate, wherein when the III-V photovoltaic cell is exposed to radiation, the III-V photovoltaic cell generates a current that powers a memory erasure device to cause an alteration of a memory state of a memory cell in an integrated circuit.
Energy Harvesting Devices and Method of Fabrication Thereof
An apparatus and method pertaining to a perpetual energy harvester. The harvester absorbs ambient infrared radiation and provides continual power regardless of the environment. The device seeks to harvest the largely overlooked blackbody radiation through use of a semiconductor thermal harvester.
Integrated circuit combination of a target integrated circuit and a plurality of thin film photovoltaic cells connected thereto using a conductive path
A device having a plurality of thin film photovoltaic cells (PV) formed over a passivation layer. The device comprises a plurality of thin film photovoltaic (PV) cells formed over the passivation layer, each PV cell includes at least a lower conducting layer (LCL) and an upper conducting layer (UCL); and a conducting path connecting at least a UCL of a first PV cell to at least a LCL of a second PV cell, wherein at least a first array of PV cells comprised of at least a first portion of the plurality of PV cells is connected by the respective UCL and LCL of each PV cell to provide a first voltage output. In an embodiment the passivation layer is formed over a target integrated circuit (TIC), the TIC having a top surface and a bottom surface.
SOLID LIGHT-RECEIVING DEVICE FOR UV LIGHT
Provided is a solid-state light-receiving device for ultraviolet light, which is capable of measuring an irradiation amount of UV-rays, which are harmful to a human body, accurately and appropriately with a simple structure, and of being formed easily and integrally with sensors of peripheral circuits, and which is small, lightweight, low cost, and suitable for mobile or wearable applications. The solid-state light-receiving device for ultraviolet light includes a first photodiode, a second photodiode, and a differential circuit to which signals based on outputs of those photodiodes are input. The solid-state light-receiving device for ultraviolet light also includes semiconductor layer regions, which are formed in and on the above-mentioned photodiodes, and each of which includes a highest concentration position of semiconductor impurities.
DIRECT INTEGRATION OF PHOTOVOLTAIC DEVICE INTO CIRCUIT BOARD
Aspects relate to a system and a method of manufacturing an integrated device. The method includes providing a circuit board, configuring an upper surface of the circuit board as a substrate, integrally depositing photovoltaic device layers that include at least a semi-conductor absorber layer, a buffer layer, and a top electrode layer on the upper surface of the circuit board to form a photovoltaic device using the upper surface of the circuit board as a photovoltaic device substrate, wherein the buffer layer is integrally deposited between the semi-conductor absorber layer and the top electrode, and electrically connecting the photovoltaic device to one or more on-board electronic components.
DIRECT INTEGRATION OF PHOTOVOLTAIC DEVICE INTO CIRCUIT BOARD
Aspects relate to a system and a method of operating an integrated device is provided. The method includes providing a circuit board that includes one or more on-board electronic components and an upper surface configured as a substrate, providing photovoltaic device layers that include at least a semi-conductor absorber layer, a buffer layer, and a top electrode layer on the upper surface of the circuit board that form a photovoltaic device using the upper surface of the circuit board as a photovoltaic device substrate, wherein the buffer layer is integrally deposited between the semi-conductor absorber layer and the top electrode, generating electricity using the photovoltaic device, and powering one or more of the on-board electronic components using the electricity from the photovoltaic device.
PROCESSING APPARATUS AND PHOTOELECTRIC CONVERSION SYSTEM
A processing apparatus includes a first storage unit for storing first array data that is based on output values of a plurality of pixels arranged in an array, a second storage unit having second array data stored therein to be used for correction of the output values from the plurality of pixels, and a correction unit including a calculation unit that corrects an output value of at least one pixel of the plurality of pixels based on the first array data and the second array data.
LOW-POWER SEMI-REFLECTIVE DISPLAY
A semi-reflective display and a method for fabricating and assembling a semi-reflective display are presented, where the display may be comprised of visible light rectifying antenna arrays tuned to four different colors, which when forward biased may use electric power to amplify reflected colored light, and when reversed biased may generate electric power by absorbing light. TFT-tunnel diode logic may be used to control each sub-pixel.
Energy harvesting devices and method of fabrication thereof
An apparatus and method pertaining to a perpetual energy harvester. The harvester absorbs ambient infrared radiation and provides continual power regardless of the environment. The device seeks to harvest the largely overlooked blackbody radiation through use of a semiconductor thermal harvester.
Method for manufacturing a solar cell
A method for manufacturing a solar cell according to an embodiment of the present invention includes preparing a semiconductor substrate having a first conductivity type dopant; ion-implanting a pre-amorphization elements into a front surface of the semiconductor substrate to form an amorphous layer; and forming an emitter layer by ion-implanting second conductivity type dopant into the front surface of the semiconductor substrate. The method then further includes heat-treating the layers to activate the second conductivity type dopant. The method further includes forming a back surface field layer at a back surface of the semiconductor substrate by ion-implanting a first conductivity type dopant.