Patent classifications
H10D30/6894
SEMICONDUCTOR DEVICE AND METHOD OF MAKING
A semiconductor device is provided. The semiconductor device includes a memory structure including a first transistor channel, a gate structure overlying the first transistor channel, and a second transistor channel overlying the gate structure. The gate structure includes a control gate.
FCNVM-ALEFD (fully covered non-volatile memory (NVM) over advanced low electrostatic field transistor (ALEFD)
Device scaling has increased the device density of integrated circuits (ICs) and reduced the cost of circuits. Today development of new device structures, use of new materials and complex process steps are implemented to continue scaling of the semiconductor devices. The added manufacturing steps and complexity have increased cost of ICs directly impacting the implementation of IoT devices that need low cost and high yields to be successful. ALEFTis a device that reduces the cost of manufacture while allowing scaling and improving device performance. A requirements of IoT devices is the ability to store data on chips using integratable memory. FCNVM-ALEFT is an integratable non-volatile memory device with a protected floating gate that is integratable with the ALEFT devices with minimum additional processing. ALEFT devices integrated with FCNVM-ALEFT is a suitable technology combination for the IoT devices.
FLASH MEMORY STRUCTURE WITH ENHANCED FLOATING GATE
The present disclosure relates to an integrated chip structure. The integrated chip structure includes a substrate having a plurality of trenches. An insulating pattern covers bottom surfaces of the plurality of trenches and inner side surfaces of the plurality of trenches. Active patterns are defined by the plurality of trenches. The active patterns are spaced apart from each other in a first direction and are parallel to each other. The first direction is parallel to a top surface of the substrate. At least one of opposite topmost ends of the active patterns has a stepwise portion.