A computing device is described that obtains a representation of a target ear canal of a user. Using a machine-learned model that has been trained based at least in part on representations of previously fabricated ear-wearable devices, the computing device generates a representation of an ear-wearable device for the target ear canal.

Conventionally, manufacturing of molded parts using composite materials has led to poor dimensional accuracy and tensile strength due to improper curing thus resulting in rejection or early/premature failure of composite part. Embodiments of the present disclosure provide simulation-based systems and methods for manufacturing/generating molded parts using reinforced composite materials. The optimized cure cycle is computed for a given component without carrying out numerous experiments. The present disclosure implements multiscale method and surrogate modeling in virtual testing for more accurate and faster manufacturing of molded parts. Process parameters for specified qualities (e.g., minimum residual stresses, minimum deformation, etc.) required for a part are determined along with least process manufacturing time. The resulting optimized time dependent cure cycle for each thermal zone of the heated mold is transferred to a master controller (e.g., system) which controls the entire curing processes with the use of feedback control.

Methods for reticle enhancement technology include representing a target wafer pattern or a predicted wafer pattern as a smooth function captured as a function sample array (FSA). The FSA is an array of sampled values of the smooth function, which is a continuous differentiable function. Methods also include providing a continuous tone mask (CTM), wherein the CTM is used to produce the predicted wafer pattern, the predicted wafer pattern spanning an entire design area.

A method of improving at least one of quality and yield of a physical process comprises: obtaining values, from respective performances of the physical process, for a plurality of variables associated with the physical process; determining at least one Gaussian mixture model (GMM) representing the values for the variables for the performances of the physical process; based at least in part on the at least one GMM, computing at least one anomaly score for at least one of the variables for at least one of the performances of the physical process; based on the at least one anomaly score, identifying the at least one of the performances of the physical process as an outlier; and, based at least in part on the outlier identification, modifying the at least one of the variables for one or more subsequent performances of the physical process.

An integrated circuit includes a first active region of a first set of transistors of a first type, a second active region of a second set of transistors of the first type, a third active region of a third set of transistors of the first type, a fourth active region of a fourth set of transistors of the first type and a fifth active region of a fifth set of transistors of a second type. The first, second, fourth and fifth active region have a first width in a second direction, and are on a first level. The third active region is on the first level, and has a second width different from the first width. The second active region is adjacent to the first boundary, and is separated from the first active region in the second direction. The fourth active region is adjacent to the second boundary.

Disclosed embodiments herein relate to an integrated circuit including metal rails. In one aspect, the integrated circuit includes a first layer including a first metal rail and a second layer including a second metal rail, where the second layer is above the first layer along a first direction. In one aspect, the integrated circuit includes a third layer including an active region of a transistor, where the third layer is above the second layer along the first direction. In one aspect, the integrated circuit includes a fourth layer including a third metal rail, where the fourth layer is above the third layer along the first direction. In one aspect, the integrated circuit includes a fifth layer including a fourth metal rail, where the fifth layer is above the fourth layer along the first direction.

The invention relates to a computer-assisted method for examining an input data set of a generative layer building device, including comparing at least one parameter value in a computer-based model of an object that is to be produced using the generative layer building device, to a limiting parameter value which is an extreme value for the parameter able to be obtained in a method for producing the object, and particularly an extreme value for the parameter that can be obtained in a process-stable manner.

A computer-aided design system enables physical articles to be customized via printing or embroidering and enables digital content to be customized and electronically shared. A user interface may be generated that includes an image of a model of an article of manufacture and user customizable design areas that are graphically indicated on the image corresponding to the model. A design area selection may be received. In response to an add design element instruction and design element specification, the specified design element is rendered in the selected design area on the model image. Customization permissions associated with the selected design area are accessed. User edits to the design element may be received and rendered in real time. Manufacturing instructions may be transmitted to a printing system using a file that includes location, rotation, and/or scale data.

In an example, a method includes obtaining an indication of a deviation from an expected dimension of at least one dimension of an object generated using an additive manufacturing apparatus. A geometrical compensation model to apply to object model data for generating objects using additive manufacturing to compensate for anticipated deviations in dimensions may be determined from the obtained indication. The geometrical compensation model may comprise a first value to apply to object model data to modify a specification of an external dimension; and a second, different, value to apply to object model data to modify a specification of an internal dimension.

A method of manufacturing a semiconductor device, a corresponding layout diagram being stored on a non-transitory computer-readable medium, the layout diagram including layout cells, the method including generating the layout diagram including: for a candidate cell amongst the layout cells in the layout diagram, avoiding a discrete calculation of a corresponding parasitic capacitance (PC) description including, within a database which stores predefined cells and corresponding parasitic capacitance (PC) descriptions thereof, searching the database for one amongst the predefined cells (matching predefined cell) that is a substantial match to the candidate cell; and, when a substantial match is found, assigning the PC description of the matching predefined cell to the candidate cell.