Patent classifications
H10D10/061
Semiconductor-on-insulator (SOI) lateral heterojunction bipolar transistor having an epitaxially grown base
A method of forming a semiconductor structure includes providing an emitter and a collector on a surface of an insulator layer. The emitter and the collector are spaced apart and have a doping of a first conductivity type. An intrinsic base is formed between the emitter and the collector and on the insulator layer by epitaxially growing the intrinsic base from at least a vertical surface of the emitter and a vertical surface of the collector. The intrinsic base has a doping of a second conductivity type opposite to the first conductivity type, and a first heterojunction exists between the emitter and the intrinsic base and a second heterojunction exists between the collector and the intrinsic base.
Transistor structures and fabrication methods thereof
Transistor structures and methods of fabricating transistor structures are provided. The methods include: fabricating a transistor structure at least partially within a substrate, the fabricating including: providing a cavity within the substrate; and forming a first portion and a second portion of the transistor structure at least partially within the cavity, the first portion being disposed at least partially between the substrate and the second portion, where the first portion inhibits diffusion of material from the second portion into the substrate. In one embodiment, the transistor structure is a field-effect transistor structure, and the first portion and the second portion include one of a source region or a drain region of the field-effect transistor structure. In another embodiment, the transistor structure is a bipolar junction transistor structure.
ELECTROSTATIC PROTECTION DEVICE
An apparatus including an electrostatic discharge (ESD) protection device comprising a semiconductor having first, second and third regions arranged to form a transistor, wherein the first region is doped with a first impurity of a first conductivity type and is separated from the second region which is doped with a second impurity of a second conductivity type opposite the first type, and wherein a dimensional constraint of the regions defines an operational threshold of the ESD protection device. In one example, the separation between a collector and an emitter of a bipolar transistor defines a trigger voltage to cause the electrostatic discharge protection device to become conducting. In another example, a width of a bipolar transistor base controls a holding voltage of the electrostatic discharge protection device.
Bi-directional ESD protection device
An integrated circuit and method with a bidirectional ESD transistor. A base diffusion separates an emitter diffusion and a collector diffusion. Silicide is blocked from the base diffusion, the emitter-base junction, the collector-base junction, and from equal portions of the emitter diffusion and the collector diffusions.
COMPLEMENTARY SOI LATERAL BIPOLAR TRANSISTORS WITH BACKPLATE BIAS
A method for fabricating a complementary bipolar junction transistor (BJT) integrated structure. The method includes forming a first backplate in a monolithic substrate below a first buried oxide (BOX) layer. Another forming step forms a second backplate in the monolithic substrate below the first BOX layer. The second backplate is electrically isolated from the first backplate. Another forming step forms an NPN lateral BJT above the first BOX layer and superposing the first backplate. The NPN lateral BJT is configured to conduct electricity horizontally between an NPN emitter and an NPN collector when the NPN lateral BJT is active. Another forming step forms a PNP lateral BJT superposing the second backplate. The PNP lateral BJT is configured to conduct electricity horizontally between a PNP emitter and a PNP collector when the PNP lateral BJT is active.
Ultra-sensitive biosensor based on lateral bipolar junction transistor having self-aligned epitaxially grown base
An exemplary biosensor sensor for detecting the presence of a biological material includes an SOI substrate, a lateral BJT formed on at least a portion of the substrate, and a sensing structure formed on at least a portion of an upper surface of the BJT. The BJT includes an emitter region, a collector region and a base region, the base region being formed between the emitter and collector regions and laterally adjacent thereto. The sensing structure includes at least one dielectric layer contacting at least a portion of the base region. The dielectric layer forms a receptacle for confining a biological molecule being tested and is configured to respond to charges in biological molecules, the charges being converted to a sensing signal by the BJT.
Magnetic-field and magnetic-field gradient sensors based on lateral SOI bipolar transistors
A lateral bipolar junction transistor (BJT) magnetic field sensor that includes a layout of two or more adjacent lateral BJT devices. Each BJT includes a semiconductor base region of a first conductivity type doping, a semiconductor emitter region of a second conductivity type doping and laterally contacting the base region; and a first semiconductor collector region of a second conductivity type doping contacting said base region on an opposite side thereof. A second collector region of the second conductivity type doping is also formed contacting the base region on the opposite side thereof in spaced apart relation with the first collector region. The first adjacent lateral BJT device includes the emitter, base and first collector region and the second adjacent lateral BJT device includes the emitter, base and second collector region. The sensor induces a detectable difference in collector current amounts in the presence of an external magnetic field transverse to a plane defined by the layout.
SEMICONDUCTOR-ON-INSULATOR LATERAL HETEROJUNCTION BIPOLAR TRANSISTOR HAVING EPITAXIALLY GROWN INTRINSIC BASE AND DEPOSITED EXTRINSIC BASE
After forming a trench extending through an insulator layer and an underlying top semiconductor portion that is comprised of a first semiconductor material and a dopant of a first conductivity type to define an emitter and a collector on opposite sides of the trench in the top semiconductor portion, an intrinsic base comprising a second semiconductor material having a bandgap less than a bandgap of the first semiconductor material and a dopant of a second conductivity type opposite the first conductivity type is formed in a lower portion the trench by selective epitaxial growth. The intrinsic base protrudes above the top semiconductor portion and is laterally surrounded by entire top semiconductor portion and a portion of the insulator layer. An extrinsic base is then formed on top of the intrinsic base to fill a remaining volume of the trench by a deposition process.
NEW BJT STRUCTURE DESIGN FOR 14NM FINFET DEVICE
A fin-type bipolar semiconductor device includes a base region having a first portion in a semiconductor substrate and a first semiconductor fin on the adjacent first portion, a collector region having a second portion in the semiconductor substrate and a second semiconductor fin on the adjacent second portion, and an emitter region having a third region in the semiconductor substrate and a third semiconductor fin on the adjacent third portion. The second portion is adjacent the first portion, and the third portion is adjacent the first portion and forms an emitter junction in the semiconductor substrate. The second portion is not adjacent to the third portion. The first, second, and third semiconductor fins are physically separated from each other. The fin-type bipolar device exhibits low leakage current, good linearity and uniformity of electrical characteristics to facilitate device matching.
LATERAL BIPOLAR JUNCTION TRANSISTOR DEVICE AND METHOD OF FORMING SAME
A lateral-bipolar junction transistor (BJT) including a semiconductor substrate, an insulator region disposed on the semiconductor substrate, and a well region comprising a well semiconductor of a first conductivity type disposed over the insulator region. An emitter region of a second conductivity type is disposed in the well region, and at least one collector region of a second conductivity type is disposed in the well region. A T shaped, Pi shaped or H shaped gate and gate oxide layer includes a gate portion extending between the emitter region and one or more collector regions, and a base is disposed underneath the gate portion. In other embodiments, a metal oxide semiconductor (MOS) transistor-based circuit similarly employs a compact Pi or H shaped gate and gate oxide layer.