Doped semiconductor ink formulations, methods of making doped semiconductor ink formulations, methods of coating or printing thin films, methods of forming electronic devices and/or structures from the thin films, and methods for modifying and controlling the threshold voltage of a thin film transistor using the films are disclosed. A desired dopant may be added to an ink formulation comprising a Group IVA compound and a solvent, and then the ink may be printed on a substrate to form thin films and conductive structures/devices, such as thin film transistors. By adding a customized amount of the dopant to the ink prior to printing, the threshold voltage of a thin film transistor made from the doped semiconductor ink may be independently controlled upon activation of the dopant.

The present invention provides a liquid crystal panel and a manufacture method thereof. The liquid crystal panel comprises: a first substrate (1), a TFT layer (2) located on the first substrate (1), a color resist layer (3) located on the TFT layer (2), a photospacer layer (4) located on the color resist layer (3), a protective layer (5) located on the color resist layer (3) and the photospacer layer (4), a via hole (6) penetrating the color resist layer (3) and the protective layer (5), a pixel electrode layer (7) formed on the protective layer (5) and electrically connected to the TFT layer (2) with the via hole (6) and a second substrate (8) oppositely located to the first substrate (1), and one or more color resist material in the photospacer layer (4) and the color resist layer (3) are the same, and the photospacer layer (4) and the color resist layer (3) are formed at the same time during a manufacture process.

A backplane for an electro-optic display comprising pixels with reduced capacitance. The pixel architecture results in a backplane with some voltage spiking, but well-suited for use with electro-optic media having at least a small threshold for switching, for example, electrophoretic media comprising particles.

A method for manufacturing a submicron semiconductor structure on a substrate, including: forming at least one template layer over a support substrate; forming one or more template structures, including one or more recesses and/or mesas, in the template layer, the one or more template structures including one or more edges extending into or out of the top surface of the template layer; coating at least part of the one or more template structures with a liquid semiconductor precursor; and, annealing and/or exposing the liquid semiconductor precursor coated template structures to light, wherein during the annealing and/or light exposure a part of the liquid semiconductor precursor accumulates by capillary forces against at least part of the one or more edges, the annealing and/or light exposure transforming the accumulated liquid semiconductor precursor into a submicron semiconductor structure extending along at least part of the one or more edges.

A liquid crystal panel includes a first substrate, a TFT layer located on the first substrate, a color resist layer located on the TFT layer, a photospacer layer located on the color resist layer, a protective layer located on the color resist layer and the photospacer layer, a via hole penetrating the color resist layer and the protective layer, a pixel electrode layer formed on the protective layer and electrically connected to the TFT layer with the via hole and a second substrate oppositely located to the first substrate, and one or more color resist material in the photospacer layer and the color resist layer are the same, and the photospacer layer and the color resist layer are formed at the same time during a manufacture process.

A method of manufacturing a substantially planar electronic device is disclosed. The method employs a resist having three different thicknesses used for defining different structures in a single masking step. Exemplary structures are substantially planar transistors having side-gates and diodes.

Provided are optical devices and systems fabricated, at least in part, via printing-based assembly and integration of device components. In specific embodiments the present invention provides light emitting systems, light collecting systems, light sensing systems and photovoltaic systems comprising printable semiconductor elements, including large area, high performance macroelectronic devices. Optical systems of the present invention comprise semiconductor elements assembled, organized and/or integrated with other device components via printing techniques that exhibit performance characteristics and functionality comparable to single crystalline semiconductor based devices fabricated using conventional high temperature processing methods. Optical systems of the present invention have device geometries and configurations, such as form factors, component densities, and component positions, accessed by printing that provide a range of useful device functionalities. Optical systems of the present invention include devices and device arrays exhibiting a range of useful physical and mechanical properties including flexibility, shapeability, conformability and stretchablity.

A thin film transistor includes a gate electrode, a semiconductor layer overlapped with the gate electrode, a gate insulating layer between the gate electrode and the semiconductor layer, and a source electrode and a drain electrode electrically connected to the semiconductor layer. The semiconductor layer includes a plurality of holes. The gate insulating layer may include a plurality of recess portions at a surface of the gate insulating layer facing the semiconductor layer. A method of manufacturing the thin film transistor is provided. A thin film transistor array panel and an electronic device may include the thin film transistor.

A method of manufacturing a liquid crystal display device including a TFT substrate with display and peripheral regions. The display region has pixels each having a pixel electrode and a TFT. A counter substrate opposes the TFT substrate and has a color filter formed at a position corresponding to a position at which the pixel electrode is formed above the TFT substrate. The method includes coating, outside of the display region of the TFT substrate, a second alignment film in the shape of a frame, and coating, in the display region, a first alignment film that dries more slowly than the second alignment film. The first and second alignment films are in contact, and the second alignment film is thicker than the first alignment film.

An array substrate and a manufacturing method thereof, a display panel and a display device are provided. The array substrate manufacturing method comprises: forming a source electrode and a drain electrode on a gate insulating layer; forming photoresist above the gate insulating layer and the source electrode and the drain electrode; etching the photoresist to form an opening region so as to expose the gate insulating layer between the source electrode and the drain electrode, and a part of the source electrode and a part of the drain electrode; and forming an active layer in the opening region, the active layer covering the exposed gate insulating layer, the part of the source electrode and the part of the drain electrode.