An electric circuit includes a first superconducting component, a second superconducting component, a first electrically-insulating component that thermally couples the first superconducting component and the second superconducting component such that heat produced in response to the first superconducting component transitioning to a non-superconducting state is transferred through the first electrically-insulating component to the second superconducting component, and a photon detector coupled to the first superconducting component. The photon detector is configured to output a first current to the first superconducting component upon detection of a threshold number of photons. The electric circuit further includes an output component coupled to the second superconducting component. The output component is configured to be responsive to a voltage drop across the second superconducting component.

A superconducting quantum hybrid system includes: a silicon carbide (SiC) epitaxial layer; and a superconducting qubit line, the superconducting qubit line corresponding to a superconducting qubit, where a designated region of the SiC epitaxial layer includes a nitrogen vacancy (NV) center, the NV center being formed by implanting nitrogen ions into the designated region of the SiC epitaxial layer, and where the superconducting qubit line is located on a surface of the SiC epitaxial layer, the superconducting qubit is coupled to a solid-state defect qubit, and the solid-state defect qubit is a qubit corresponding to the NV center in the designated region.

According to one embodiment, a superconducting element used as a pixel for detecting a particle is disclosed. The superconducting element includes at least one superconducting strip. The at least one superconducting strip includes a superconducting portion extending in a first direction, including first and second ends and made of a first superconducting material, a first conductive portion connected to the first end of the superconducting portion, and a second conductive portion connected to the second end of the superconducting portion. A superconducting region of the superconducting portion is configured to be dived when the particle is made incident on the superconducting portion along the first direction via the first conductive portion.

A magnetic Josephson junction (MJJ) device having a ferrimagnetic/ferromagnetic (FIM/FM) exchange-biased bilayer used as the magnetic hard layer improves switching performance by effectively sharpening the hysteresis curve of the device, thereby reducing error rate when the device is used in a Josephson magnetic random access memory (JMRAM) memory cell. Thus, the materials and devices described herein can be used to build a new type of MJJ, termed a ferrimagnetic Josephson junction (FIMJJ), for use in JMRAM, to construct a robust and reliable cryogenic computer memory that can be used for high-speed superconducting computing, e.g., with clock speeds in the microwave frequency range.

An active cooling structure, comprising a non-superconducting layer, a superconducting layer, and an array of Superconductor-Insulator-Normal Metal (NIS) tunnel junctions. The non-superconducting layer may comprise a plurality of non-superconducting traces. The superconducting layer may comprise a plurality of superconducting traces. The array of Superconductor-Insulator-Normal Metal (NIS) tunnel junctions may be located between the plurality of non-superconducting traces and the plurality of superconducting traces.

A method of fabricating a semiconductor-superconductor hybrid device comprises providing a workpiece comprising a semiconductor component, a layer of a first superconductor material on the semiconductor component, and a layer of a second superconductor material on the first superconductor material, the second superconductor material being different from the first superconductor material; etching the layer of the second superconductor material to expose a portion of the first superconductor material; and oxidising the portion of the first superconductor material to form a passivating layer on the semiconductor. The first superconductor provides energy coupling between the semiconductor and the second superconductor, and the passivating layer protects the semiconductor while allowing electrostatic access thereto. Also provided are a hybrid device, and a method of etching.

A Type II superconductor includes a perforated carbonaceous material with an activating material on at least one surface. The activating material a non-polar liquid that does not incorporate Pi-bonding in its structure. The superconductor is manufactured by perforating a carbonaceous material to produce voids and coating at least one surface of the carbonaceous material with the activating material. A superconductive cable includes wires with a perforated carbonaceous material wetted with the activating material on a non-conductive substrate interspersed with non-conducting spacers and surrounded by an insulation layer. The superconductor conducts current at room temperature and above.

A device comprising: a portion of semiconductor; a portion of superconductor arranged to a enable a topological phase having a topological gap to be induced in a region of the semiconductor by proximity effect; and a portion of a non-magnetic material comprising an element with atomic number Z greater than or equal to 26, arranged to increase the topological gap in the topological region of the semiconductor.

Various techniques and apparatus permit fabrication of superconductive circuits. A superconducting integrated circuit comprising a superconducting stud via, a kinetic inductor, and a capacitor may be formed. Forming a superconducting stud via in a superconducting integrated circuit may include masking with a hard mask and masking with a soft mask. Forming a superconducting stud via in a superconducting integrated circuit may include depositing a dielectric etch stop layer. Interlayer misalignment in the fabrication of a superconducting integrated circuit may be measured by an electrical vernier. Interlayer misalignment in the fabrication of a superconducting integrated circuit may be measured by a chain of electrical verniers and a Wheatstone bridge. A superconducting integrated circuit with three or more metal layers may include an enclosed, matched, on-chip transmission line. A metal wiring layer in a superconducting integrated circuit may be encapsulated.

A bulk superconductor device is disclosed, comprising a single grain RE-BCO element incorporating reinforcing fibres. The single grain (RE)BCO element comprises RE-211 pinning sites disposed in a RE-123 matrix and further comprises Ag. The reinforcing fibres comprise a ceramic such as SiC and a refractory metal such as W. The reinforcing fibres comprise a core formed of the refractory metal and a ceramic cladding surrounding the core. The device may be manufactured by a top seeded melt growth process or by a top seeded infiltration growth process.